Lines Matching refs:slot
29 struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
30 struct pci_dev *pdev = cb710_slot_to_chip(slot)->pdev;
56 dev_dbg(cb710_slot_dev(slot),
62 static void __cb710_mmc_enable_irq(struct cb710_slot *slot,
74 enable = (cb710_read_port_16(slot, CB710_MMC_IRQ_ENABLE_PORT)
80 cb710_write_port_16(slot, CB710_MMC_IRQ_ENABLE_PORT, enable);
83 static void cb710_mmc_enable_irq(struct cb710_slot *slot,
86 struct cb710_mmc_reader *reader = mmc_priv(cb710_slot_to_mmc(slot));
91 __cb710_mmc_enable_irq(slot, enable, mask);
95 static void cb710_mmc_reset_events(struct cb710_slot *slot)
97 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, 0xFF);
98 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, 0xFF);
99 cb710_write_port_8(slot, CB710_MMC_STATUS2_PORT, 0xFF);
102 static void cb710_mmc_enable_4bit_data(struct cb710_slot *slot, int enable)
105 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT,
108 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT,
112 static int cb710_check_event(struct cb710_slot *slot, u8 what)
116 status = cb710_read_port_16(slot, CB710_MMC_STATUS_PORT);
120 dev_dbg(cb710_slot_dev(slot),
122 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT,
128 dev_dbg(cb710_slot_dev(slot),
130 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, status & 0xFF);
131 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT,
138 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, what);
145 static int cb710_wait_for_event(struct cb710_slot *slot, u8 what)
152 e = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
155 while (!(err = cb710_check_event(slot, what))) {
157 cb710_dump_regs(cb710_slot_to_chip(slot),
166 x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
170 dev_dbg(cb710_slot_dev(slot),
178 static int cb710_wait_while_busy(struct cb710_slot *slot, uint8_t mask)
185 e = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
188 while (cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) & mask) {
190 cb710_dump_regs(cb710_slot_to_chip(slot),
199 x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
203 dev_dbg(cb710_slot_dev(slot),
210 static void cb710_mmc_set_transfer_size(struct cb710_slot *slot,
213 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
214 cb710_write_port_32(slot, CB710_MMC_TRANSFER_SIZE_PORT,
217 dev_vdbg(cb710_slot_dev(slot), "set up for %zu block%s of %zu bytes\n",
221 static void cb710_mmc_fifo_hack(struct cb710_slot *slot)
227 r1 = cb710_read_port_32(slot, CB710_MMC_DATA_PORT);
228 r2 = cb710_read_port_32(slot, CB710_MMC_DATA_PORT);
229 if (cb710_read_port_8(slot, CB710_MMC_STATUS0_PORT)
231 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT,
236 dev_dbg(cb710_slot_dev(slot),
239 dev_dbg(cb710_slot_dev(slot),
244 static int cb710_mmc_receive_pio(struct cb710_slot *slot,
247 if (!(cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) & CB710_MMC_S2_FIFO_READY)) {
248 int err = cb710_wait_for_event(slot,
255 slot->iobase + CB710_MMC_DATA_PORT, dw_count);
265 static int cb710_mmc_receive(struct cb710_slot *slot, struct mmc_data *data)
278 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
281 cb710_mmc_fifo_hack(slot);
287 err = cb710_mmc_receive_pio(slot, &miter, 4);
296 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
300 err = cb710_mmc_receive_pio(slot, &miter, len);
309 static int cb710_mmc_send(struct cb710_slot *slot, struct mmc_data *data)
322 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
328 if (!(cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT)
330 err = cb710_wait_for_event(slot,
336 slot->iobase + CB710_MMC_DATA_PORT, 4);
395 static void cb710_receive_response(struct cb710_slot *slot,
404 resp[0] = cb710_read_port_32(slot, CB710_MMC_RESPONSE3_PORT);
405 resp[1] = cb710_read_port_32(slot, CB710_MMC_RESPONSE2_PORT);
406 resp[2] = cb710_read_port_32(slot, CB710_MMC_RESPONSE1_PORT);
407 resp[3] = cb710_read_port_32(slot, CB710_MMC_RESPONSE0_PORT);
415 rsp_opcode = cb710_read_port_32(slot, CB710_MMC_RESPONSE1_PORT) & 0x3F;
416 cmd->resp[0] = cb710_read_port_32(slot, CB710_MMC_RESPONSE0_PORT);
424 static int cb710_mmc_transfer_data(struct cb710_slot *slot,
430 error = cb710_mmc_receive(slot, data);
432 error = cb710_mmc_send(slot, data);
434 to = cb710_wait_for_event(slot, CB710_MMC_S1_DATA_TRANSFER_DONE);
445 struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
450 dev_dbg(cb710_slot_dev(slot), "cmd request: 0x%04X\n", cb_cmd);
457 cb710_mmc_set_transfer_size(slot, data->blocks, data->blksz);
460 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20|CB710_MMC_S2_BUSY_10);
461 cb710_write_port_16(slot, CB710_MMC_CMD_TYPE_PORT, cb_cmd);
462 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
463 cb710_write_port_32(slot, CB710_MMC_CMD_PARAM_PORT, cmd->arg);
464 cb710_mmc_reset_events(slot);
465 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
466 cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x01, 0);
468 cmd->error = cb710_wait_for_event(slot, CB710_MMC_S1_COMMAND_SENT);
473 cb710_receive_response(slot, cmd);
479 data->error = cb710_mmc_transfer_data(slot, data);
485 struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
491 cb710_mmc_enable_irq(slot, CB710_MMC_IE_TEST_MASK, 0);
499 static int cb710_mmc_powerup(struct cb710_slot *slot)
502 struct cb710_chip *chip = cb710_slot_to_chip(slot);
507 dev_dbg(cb710_slot_dev(slot), "bus powerup\n");
509 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
512 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x80, 0);
513 cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0x80, 0);
516 dev_dbg(cb710_slot_dev(slot), "after delay 1\n");
518 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
521 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x09, 0);
524 dev_dbg(cb710_slot_dev(slot), "after delay 2\n");
526 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
529 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0, 0x08);
532 dev_dbg(cb710_slot_dev(slot), "after delay 3\n");
534 cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x06, 0);
535 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x70, 0);
536 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 0x80, 0);
537 cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0x03, 0);
539 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
546 cb710_write_port_16(slot, CB710_MMC_CONFIGB_PORT, 0xFFFF);
547 cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x06, 0);
549 dev_dbg(cb710_slot_dev(slot), "bus powerup finished\n");
551 return cb710_check_event(slot, 0);
554 static void cb710_mmc_powerdown(struct cb710_slot *slot)
556 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0, 0x81);
557 cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0, 0x80);
562 struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
571 err = cb710_mmc_powerup(slot);
573 dev_warn(cb710_slot_dev(slot),
575 cb710_mmc_powerdown(slot);
577 err = cb710_mmc_powerup(slot);
579 dev_warn(cb710_slot_dev(slot),
586 cb710_mmc_powerdown(slot);
596 cb710_mmc_enable_4bit_data(slot, ios->bus_width != MMC_BUS_WIDTH_1);
598 cb710_mmc_enable_irq(slot, CB710_MMC_IE_TEST_MASK, 0);
603 struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
605 return cb710_read_port_8(slot, CB710_MMC_STATUS3_PORT)
611 struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
613 return cb710_read_port_8(slot, CB710_MMC_STATUS3_PORT)
617 static int cb710_mmc_irq_handler(struct cb710_slot *slot)
619 struct mmc_host *mmc = cb710_slot_to_mmc(slot);
623 status = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
624 irqen = cb710_read_port_32(slot, CB710_MMC_IRQ_ENABLE_PORT);
625 config2 = cb710_read_port_32(slot, CB710_MMC_CONFIGB_PORT);
626 config1 = cb710_read_port_32(slot, CB710_MMC_CONFIG_PORT);
628 dev_dbg(cb710_slot_dev(slot), "interrupt; status: %08X, "
634 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT,
640 dev_dbg(cb710_slot_dev(slot), "unknown interrupt (test)\n");
642 __cb710_mmc_enable_irq(slot, 0, CB710_MMC_IE_TEST_MASK);
670 struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
672 cb710_mmc_enable_irq(slot, 0, ~0);
678 struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
680 cb710_mmc_enable_irq(slot, 0, ~0);
688 struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
689 struct cb710_chip *chip = cb710_slot_to_chip(slot);
695 mmc = mmc_alloc_host(sizeof(*reader), cb710_slot_dev(slot));
704 dev_dbg(cb710_slot_dev(slot), "source frequency: %dMHz\n", val);
726 cb710_mmc_enable_irq(slot, 0, ~0);
727 cb710_set_irq_handler(slot, cb710_mmc_irq_handler);
733 dev_dbg(cb710_slot_dev(slot), "mmc_hostname is %s\n",
736 cb710_mmc_enable_irq(slot, CB710_MMC_IE_CARD_INSERTION_STATUS, 0);
741 dev_dbg(cb710_slot_dev(slot), "mmc_add_host() failed: %d\n", err);
743 cb710_set_irq_handler(slot, NULL);
750 struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
751 struct mmc_host *mmc = cb710_slot_to_mmc(slot);
754 cb710_mmc_enable_irq(slot, 0, CB710_MMC_IE_CARD_INSERTION_STATUS);
759 cb710_mmc_enable_irq(slot, 0, ~0);
760 cb710_set_irq_handler(slot, NULL);
763 cb710_write_port_32(slot, CB710_MMC_CONFIG_PORT, 0);
764 cb710_write_port_16(slot, CB710_MMC_CONFIGB_PORT, 0);