Lines Matching refs:dev
81 * @dev: the device structure
83 void mei_cancel_work(struct mei_device *dev)
85 cancel_work_sync(&dev->reset_work);
86 cancel_work_sync(&dev->bus_rescan_work);
88 cancel_delayed_work_sync(&dev->timer_work);
92 static void mei_save_fw_status(struct mei_device *dev)
97 ret = mei_fw_status(dev, &fw_status);
99 dev_err(dev->dev, "failed to read firmware status: %d\n", ret);
103 dev->saved_dev_state = dev->dev_state;
104 dev->saved_fw_status_flag = true;
105 memcpy(&dev->saved_fw_status, &fw_status, sizeof(fw_status));
111 * @dev: the device structure
115 int mei_reset(struct mei_device *dev)
117 enum mei_dev_state state = dev->dev_state;
127 mei_fw_status_str(dev, fw_sts_str, MEI_FW_STATUS_STR_SZ);
128 if (kind_is_gsc(dev) || kind_is_gscfi(dev)) {
129 dev_dbg(dev->dev, "unexpected reset: dev_state = %s fw status = %s\n",
131 mei_save_fw_status(dev);
133 dev_warn(dev->dev, "unexpected reset: dev_state = %s fw status = %s\n",
138 mei_clear_interrupts(dev);
145 mei_hbm_idle(dev);
149 mei_set_devstate(dev, MEI_DEV_RESETTING);
151 dev->reset_count++;
152 if (dev->reset_count > MEI_MAX_CONSEC_RESET) {
153 dev_err(dev->dev, "reset: reached maximal consecutive resets: disabling the device\n");
154 mei_set_devstate(dev, MEI_DEV_DISABLED);
158 ret = mei_hw_reset(dev, interrupts_enabled);
163 mei_cl_all_disconnect(dev);
165 mei_hbm_reset(dev);
168 dev->fw_ver_received = 0;
170 memset(dev->rd_msg_hdr, 0, sizeof(dev->rd_msg_hdr));
173 dev_err(dev->dev, "hw_reset failed ret = %d\n", ret);
178 dev_dbg(dev->dev, "powering down: end of reset\n");
179 mei_set_devstate(dev, MEI_DEV_DISABLED);
183 ret = mei_hw_start(dev);
187 mei_fw_status_str(dev, fw_sts_str, MEI_FW_STATUS_STR_SZ);
188 dev_err(dev->dev, "hw_start failed ret = %d fw status = %s\n", ret, fw_sts_str);
192 if (dev->dev_state != MEI_DEV_RESETTING) {
193 dev_dbg(dev->dev, "wrong state = %d on link start\n", dev->dev_state);
197 dev_dbg(dev->dev, "link is established start sending messages.\n");
199 mei_set_devstate(dev, MEI_DEV_INIT_CLIENTS);
200 ret = mei_hbm_start_req(dev);
202 dev_err(dev->dev, "hbm_start failed ret = %d\n", ret);
203 mei_set_devstate(dev, MEI_DEV_RESETTING);
214 * @dev: the device structure
218 int mei_start(struct mei_device *dev)
222 mutex_lock(&dev->device_lock);
225 mei_clear_interrupts(dev);
227 ret = mei_hw_config(dev);
231 dev_dbg(dev->dev, "reset in start the mei device.\n");
233 dev->reset_count = 0;
235 mei_set_devstate(dev, MEI_DEV_INITIALIZING);
236 ret = mei_reset(dev);
238 if (ret == -ENODEV || dev->dev_state == MEI_DEV_DISABLED) {
239 dev_err(dev->dev, "reset failed ret = %d", ret);
244 if (mei_hbm_start_wait(dev)) {
245 dev_err(dev->dev, "HBM haven't started");
249 if (!mei_hbm_version_is_supported(dev)) {
250 dev_dbg(dev->dev, "MEI start failed.\n");
254 dev_dbg(dev->dev, "link layer has been established.\n");
256 mutex_unlock(&dev->device_lock);
259 dev_err(dev->dev, "link layer initialization failed.\n");
260 mei_set_devstate(dev, MEI_DEV_DISABLED);
261 mutex_unlock(&dev->device_lock);
269 * @dev: the device structure
273 int mei_restart(struct mei_device *dev)
277 mutex_lock(&dev->device_lock);
279 mei_set_devstate(dev, MEI_DEV_POWER_UP);
280 dev->reset_count = 0;
282 err = mei_reset(dev);
284 mutex_unlock(&dev->device_lock);
286 if (err == -ENODEV || dev->dev_state == MEI_DEV_DISABLED) {
287 dev_err(dev->dev, "device disabled = %d\n", err);
293 schedule_work(&dev->reset_work);
302 struct mei_device *dev =
306 mei_clear_interrupts(dev);
307 mei_synchronize_irq(dev);
309 mutex_lock(&dev->device_lock);
311 ret = mei_reset(dev);
313 mutex_unlock(&dev->device_lock);
315 if (dev->dev_state == MEI_DEV_DISABLED) {
316 dev_err(dev->dev, "device disabled = %d\n", ret);
322 schedule_work(&dev->reset_work);
325 void mei_stop(struct mei_device *dev)
327 dev_dbg(dev->dev, "stopping the device.\n");
329 mutex_lock(&dev->device_lock);
330 mei_set_devstate(dev, MEI_DEV_POWERING_DOWN);
331 mutex_unlock(&dev->device_lock);
332 mei_cl_bus_remove_devices(dev);
333 mutex_lock(&dev->device_lock);
334 mei_set_devstate(dev, MEI_DEV_POWER_DOWN);
335 mutex_unlock(&dev->device_lock);
337 mei_cancel_work(dev);
339 mei_clear_interrupts(dev);
340 mei_synchronize_irq(dev);
342 mei_cancel_work(dev);
344 mutex_lock(&dev->device_lock);
346 mei_reset(dev);
348 mei_set_devstate(dev, MEI_DEV_DISABLED);
350 mutex_unlock(&dev->device_lock);
357 * @dev: the device structure
361 bool mei_write_is_idle(struct mei_device *dev)
363 bool idle = (dev->dev_state == MEI_DEV_ENABLED &&
364 list_empty(&dev->ctrl_wr_list) &&
365 list_empty(&dev->write_list) &&
366 list_empty(&dev->write_waiting_list));
368 dev_dbg(dev->dev, "write pg: is idle[%d] state=%s ctrl=%01d write=%01d wwait=%01d\n",
370 mei_dev_state_str(dev->dev_state),
371 list_empty(&dev->ctrl_wr_list),
372 list_empty(&dev->write_list),
373 list_empty(&dev->write_waiting_list));
382 * @dev: the mei device
387 void mei_device_init(struct mei_device *dev,
393 INIT_LIST_HEAD(&dev->file_list);
394 INIT_LIST_HEAD(&dev->device_list);
395 INIT_LIST_HEAD(&dev->me_clients);
396 mutex_init(&dev->device_lock);
397 init_rwsem(&dev->me_clients_rwsem);
398 mutex_init(&dev->cl_bus_lock);
399 init_waitqueue_head(&dev->wait_hw_ready);
400 init_waitqueue_head(&dev->wait_pg);
401 init_waitqueue_head(&dev->wait_hbm_start);
402 dev->dev_state = MEI_DEV_INITIALIZING;
403 dev->reset_count = 0;
405 INIT_LIST_HEAD(&dev->write_list);
406 INIT_LIST_HEAD(&dev->write_waiting_list);
407 INIT_LIST_HEAD(&dev->ctrl_wr_list);
408 INIT_LIST_HEAD(&dev->ctrl_rd_list);
409 dev->tx_queue_limit = MEI_TX_QUEUE_LIMIT_DEFAULT;
411 INIT_DELAYED_WORK(&dev->timer_work, mei_timer);
412 INIT_WORK(&dev->reset_work, mei_reset_work);
413 INIT_WORK(&dev->bus_rescan_work, mei_cl_bus_rescan_work);
415 bitmap_zero(dev->host_clients_map, MEI_CLIENTS_MAX);
416 dev->open_handle_count = 0;
418 dev->pxp_mode = MEI_DEV_PXP_DEFAULT;
419 dev->gsc_reset_to_pxp = MEI_DEV_RESET_TO_PXP_DEFAULT;
425 bitmap_set(dev->host_clients_map, 0, 1);
427 dev->pg_event = MEI_PG_EVENT_IDLE;
428 dev->ops = hw_ops;
429 dev->dev = device;
431 dev->timeouts.hw_ready = mei_secs_to_jiffies(MEI_HW_READY_TIMEOUT);
432 dev->timeouts.connect = MEI_CONNECT_TIMEOUT;
433 dev->timeouts.client_init = MEI_CLIENTS_INIT_TIMEOUT;
434 dev->timeouts.pgi = mei_secs_to_jiffies(MEI_PGI_TIMEOUT);
435 dev->timeouts.d0i3 = mei_secs_to_jiffies(MEI_D0I3_TIMEOUT);
437 dev->timeouts.cl_connect = mei_secs_to_jiffies(MEI_CL_CONNECT_TIMEOUT_SLOW);
438 dev->timeouts.hbm = mei_secs_to_jiffies(MEI_HBM_TIMEOUT_SLOW);
439 dev->timeouts.mkhi_recv = msecs_to_jiffies(MKHI_RCV_TIMEOUT_SLOW);
441 dev->timeouts.cl_connect = mei_secs_to_jiffies(MEI_CL_CONNECT_TIMEOUT);
442 dev->timeouts.hbm = mei_secs_to_jiffies(MEI_HBM_TIMEOUT);
443 dev->timeouts.mkhi_recv = msecs_to_jiffies(MKHI_RCV_TIMEOUT);