drivers/mfd/ucb1x00-ts.c

40 	struct ucb1x00		*ucb;
79 	ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
92 		ucb1x00_io_write(ts->ucb, COLLIE_TC35143_GPIO_TBL_CHK, 0);
93 		ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
99 		return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_AD2, ts->adcsync);
101 		ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
106 		return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync);
119 		ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK);
121 		ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
124 		ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
128 	ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
134 	return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync);
146 		ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK);
148 		ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
151 		ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
156 	ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
162 	return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPX, ts->adcsync);
171 	ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
174 	return ucb1x00_adc_read(ts->ucb, 0, ts->adcsync);
183 	ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
186 	return ucb1x00_adc_read(ts->ucb, 0, ts->adcsync);
191 	unsigned int val = ucb1x00_reg_read(ts->ucb, UCB_TS_CR);
220 		ucb1x00_adc_enable(ts->ucb);
230 		ucb1x00_adc_disable(ts->ucb);
234 		ucb1x00_enable(ts->ucb);
243 				enable_irq(ts->ucb->irq_base + UCB_IRQ_TSPX);
246 			ucb1x00_disable(ts->ucb);
259 			ucb1x00_disable(ts->ucb);
294 	disable_irq_nosync(ts->ucb->irq_base + UCB_IRQ_TSPX);
317 	ret = request_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ucb1x00_ts_irq,
326 	ucb1x00_adc_enable(ts->ucb);
329 	ucb1x00_adc_disable(ts->ucb);
335 		free_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ts);
354 	ucb1x00_enable(ts->ucb);
355 	free_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ts);
356 	ucb1x00_reg_write(ts->ucb, UCB_TS_CR, 0);
357 	ucb1x00_disable(ts->ucb);
377 	ts->ucb = dev->ucb;
383 	idev->id.product = ts->ucb->id;
386 	idev->dev.parent = &ts->ucb->dev;
393 	ucb1x00_adc_enable(ts->ucb);
396 	ucb1x00_adc_disable(ts->ucb);