drivers/mfd/max14577.c

194 	{ .reg_offset = 0, .mask = MAX14577_INT1_ADC_MASK, },
195 	{ .reg_offset = 0, .mask = MAX14577_INT1_ADCLOW_MASK, },
196 	{ .reg_offset = 0, .mask = MAX14577_INT1_ADCERR_MASK, },
198 	{ .reg_offset = 1, .mask = MAX14577_INT2_CHGTYP_MASK, },
199 	{ .reg_offset = 1, .mask = MAX14577_INT2_CHGDETRUN_MASK, },
200 	{ .reg_offset = 1, .mask = MAX14577_INT2_DCDTMR_MASK, },
201 	{ .reg_offset = 1, .mask = MAX14577_INT2_DBCHG_MASK, },
202 	{ .reg_offset = 1, .mask = MAX14577_INT2_VBVOLT_MASK, },
204 	{ .reg_offset = 2, .mask = MAX14577_INT3_EOC_MASK, },
205 	{ .reg_offset = 2, .mask = MAX14577_INT3_CGMBC_MASK, },
206 	{ .reg_offset = 2, .mask = MAX14577_INT3_OVP_MASK, },
207 	{ .reg_offset = 2, .mask = MAX14577_INT3_MBCCHGERR_MASK, },
221 	{ .reg_offset = 0, .mask = MAX14577_INT1_ADC_MASK, },
222 	{ .reg_offset = 0, .mask = MAX14577_INT1_ADCLOW_MASK, },
223 	{ .reg_offset = 0, .mask = MAX14577_INT1_ADCERR_MASK, },
224 	{ .reg_offset = 0, .mask = MAX77836_INT1_ADC1K_MASK, },
226 	{ .reg_offset = 1, .mask = MAX14577_INT2_CHGTYP_MASK, },
227 	{ .reg_offset = 1, .mask = MAX14577_INT2_CHGDETRUN_MASK, },
228 	{ .reg_offset = 1, .mask = MAX14577_INT2_DCDTMR_MASK, },
229 	{ .reg_offset = 1, .mask = MAX14577_INT2_DBCHG_MASK, },
230 	{ .reg_offset = 1, .mask = MAX14577_INT2_VBVOLT_MASK, },
231 	{ .reg_offset = 1, .mask = MAX77836_INT2_VIDRM_MASK, },
233 	{ .reg_offset = 2, .mask = MAX14577_INT3_EOC_MASK, },
234 	{ .reg_offset = 2, .mask = MAX14577_INT3_CGMBC_MASK, },
235 	{ .reg_offset = 2, .mask = MAX14577_INT3_OVP_MASK, },
236 	{ .reg_offset = 2, .mask = MAX14577_INT3_MBCCHGERR_MASK, },
249 	{ .reg_offset = 0, .mask = MAX77836_TOPSYS_INT_T120C_MASK, },
250 	{ .reg_offset = 0, .mask = MAX77836_TOPSYS_INT_T140C_MASK, },