Lines Matching refs:pmc

75  * @pmc: PMC device pointer
83 int intel_pmc_gcr_read64(struct intel_pmc_dev *pmc, u32 offset, u64 *data)
88 spin_lock(&pmc->gcr_lock);
89 *data = readq(pmc->gcr_mem_base + offset);
90 spin_unlock(&pmc->gcr_lock);
98 * @pmc: PMC device pointer
108 int intel_pmc_gcr_update(struct intel_pmc_dev *pmc, u32 offset, u32 mask, u32 val)
115 spin_lock(&pmc->gcr_lock);
116 new_val = readl(pmc->gcr_mem_base + offset);
119 writel(new_val, pmc->gcr_mem_base + offset);
121 new_val = readl(pmc->gcr_mem_base + offset);
122 spin_unlock(&pmc->gcr_lock);
131 * @pmc: PMC device pointer
139 int intel_pmc_s0ix_counter_read(struct intel_pmc_dev *pmc, u64 *data)
143 spin_lock(&pmc->gcr_lock);
144 deep = readq(pmc->gcr_mem_base + PMC_GCR_TELEM_DEEP_S0IX_REG);
145 shlw = readq(pmc->gcr_mem_base + PMC_GCR_TELEM_SHLW_S0IX_REG);
146 spin_unlock(&pmc->gcr_lock);
169 struct intel_pmc_dev *pmc = dev_get_drvdata(dev);
170 struct intel_scu_ipc_dev *scu = pmc->scu;
205 struct intel_pmc_dev *pmc = dev_get_drvdata(dev);
206 struct intel_scu_ipc_dev *scu = pmc->scu;
304 struct intel_pmc_dev *pmc,
331 pmc->gcr_mem_base = devm_ioremap_resource(&pdev->dev, &gcr_res);
332 if (IS_ERR(pmc->gcr_mem_base))
333 return PTR_ERR(pmc->gcr_mem_base);
388 pmc->telem_base = res;
393 static int intel_pmc_create_devices(struct intel_pmc_dev *pmc)
398 ret = devm_mfd_add_devices(pmc->dev, PLATFORM_DEVID_AUTO, &tco,
404 ret = devm_mfd_add_devices(pmc->dev, PLATFORM_DEVID_AUTO, &punit, 1,
409 if (pmc->telem_base) {
410 ret = devm_mfd_add_devices(pmc->dev, PLATFORM_DEVID_AUTO,
411 &telem, 1, pmc->telem_base, 0, NULL);
426 struct intel_pmc_dev *pmc;
429 pmc = devm_kzalloc(&pdev->dev, sizeof(*pmc), GFP_KERNEL);
430 if (!pmc)
433 pmc->dev = &pdev->dev;
434 spin_lock_init(&pmc->gcr_lock);
436 ret = intel_pmc_get_resources(pdev, pmc, &scu_data);
442 pmc->scu = devm_intel_scu_ipc_register(&pdev->dev, &scu_data);
443 if (IS_ERR(pmc->scu))
444 return PTR_ERR(pmc->scu);
446 platform_set_drvdata(pdev, pmc);
448 ret = intel_pmc_create_devices(pmc);