Lines Matching refs:tmp
113 u32 tmp = PCAP_REGISTER_READ_OP_BIT |
117 ret = ezx_pcap_putget(pcap, &tmp);
121 tmp &= (PCAP_REGISTER_VALUE_MASK & ~mask);
122 tmp |= (val & mask) | PCAP_REGISTER_WRITE_OP_BIT |
125 ret = ezx_pcap_putget(pcap, &tmp);
217 u32 tmp;
220 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
221 tmp &= ~(PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
222 tmp |= bits & (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
223 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
230 u32 tmp;
232 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
233 tmp &= ~(PCAP_ADC_ADEN|PCAP_ADC_BATT_I_ADC|PCAP_ADC_BATT_I_POLARITY);
234 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
240 u32 tmp;
252 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
253 tmp &= (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
254 tmp |= pcap->adc_queue[head]->flags | PCAP_ADC_ADEN;
257 tmp |= PCAP_ADC_AD_SEL1;
259 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
269 u32 tmp;
280 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
281 tmp &= ~(PCAP_ADC_ADA1_MASK | PCAP_ADC_ADA2_MASK);
282 tmp |= (req->ch[0] << PCAP_ADC_ADA1_SHIFT);
283 tmp |= (req->ch[1] << PCAP_ADC_ADA2_SHIFT);
284 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
285 ezx_pcap_read(pcap, PCAP_REG_ADR, &tmp);
286 res[0] = (tmp & PCAP_ADR_ADD1_MASK) >> PCAP_ADR_ADD1_SHIFT;
287 res[1] = (tmp & PCAP_ADR_ADD2_MASK) >> PCAP_ADR_ADD2_SHIFT;