Lines Matching defs:pcap
14 #include <linux/mfd/ezx-pcap.h>
55 static int ezx_pcap_putget(struct pcap_chip *pcap, u32 *data)
66 pcap->buf = *data;
67 t.tx_buf = (u8 *) &pcap->buf;
68 t.rx_buf = (u8 *) &pcap->buf;
69 status = spi_sync(pcap->spi, &m);
72 *data = pcap->buf;
77 int ezx_pcap_write(struct pcap_chip *pcap, u8 reg_num, u32 value)
82 spin_lock_irqsave(&pcap->io_lock, flags);
86 ret = ezx_pcap_putget(pcap, &value);
87 spin_unlock_irqrestore(&pcap->io_lock, flags);
93 int ezx_pcap_read(struct pcap_chip *pcap, u8 reg_num, u32 *value)
98 spin_lock_irqsave(&pcap->io_lock, flags);
102 ret = ezx_pcap_putget(pcap, value);
103 spin_unlock_irqrestore(&pcap->io_lock, flags);
109 int ezx_pcap_set_bits(struct pcap_chip *pcap, u8 reg_num, u32 mask, u32 val)
116 spin_lock_irqsave(&pcap->io_lock, flags);
117 ret = ezx_pcap_putget(pcap, &tmp);
125 ret = ezx_pcap_putget(pcap, &tmp);
127 spin_unlock_irqrestore(&pcap->io_lock, flags);
134 int irq_to_pcap(struct pcap_chip *pcap, int irq)
136 return irq - pcap->irq_base;
140 int pcap_to_irq(struct pcap_chip *pcap, int irq)
142 return pcap->irq_base + irq;
148 struct pcap_chip *pcap = irq_data_get_irq_chip_data(d);
150 pcap->msr |= 1 << irq_to_pcap(pcap, d->irq);
151 queue_work(pcap->workqueue, &pcap->msr_work);
156 struct pcap_chip *pcap = irq_data_get_irq_chip_data(d);
158 pcap->msr &= ~(1 << irq_to_pcap(pcap, d->irq));
159 queue_work(pcap->workqueue, &pcap->msr_work);
163 .name = "pcap",
171 struct pcap_chip *pcap = container_of(work, struct pcap_chip, msr_work);
173 ezx_pcap_write(pcap, PCAP_REG_MSR, pcap->msr);
178 struct pcap_chip *pcap = container_of(work, struct pcap_chip, isr_work);
179 struct pcap_platform_data *pdata = dev_get_platdata(&pcap->spi->dev);
184 ezx_pcap_read(pcap, PCAP_REG_MSR, &msr);
185 ezx_pcap_read(pcap, PCAP_REG_ISR, &isr);
189 ezx_pcap_read(pcap, PCAP_REG_INT_SEL, &int_sel);
193 ezx_pcap_write(pcap, PCAP_REG_MSR, isr | msr);
194 ezx_pcap_write(pcap, PCAP_REG_ISR, isr);
197 for (irq = pcap->irq_base; service; service >>= 1, irq++) {
201 ezx_pcap_write(pcap, PCAP_REG_MSR, pcap->msr);
207 struct pcap_chip *pcap = irq_desc_get_handler_data(desc);
210 queue_work(pcap->workqueue, &pcap->isr_work);
214 void pcap_set_ts_bits(struct pcap_chip *pcap, u32 bits)
219 spin_lock_irqsave(&pcap->adc_lock, flags);
220 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
223 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
224 spin_unlock_irqrestore(&pcap->adc_lock, flags);
228 static void pcap_disable_adc(struct pcap_chip *pcap)
232 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
234 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
237 static void pcap_adc_trigger(struct pcap_chip *pcap)
243 spin_lock_irqsave(&pcap->adc_lock, flags);
244 head = pcap->adc_head;
245 if (!pcap->adc_queue[head]) {
247 pcap_disable_adc(pcap);
248 spin_unlock_irqrestore(&pcap->adc_lock, flags);
252 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
254 tmp |= pcap->adc_queue[head]->flags | PCAP_ADC_ADEN;
256 if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1)
259 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
260 spin_unlock_irqrestore(&pcap->adc_lock, flags);
261 ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC);
266 struct pcap_chip *pcap = _pcap;
271 spin_lock(&pcap->adc_lock);
272 req = pcap->adc_queue[pcap->adc_head];
275 spin_unlock(&pcap->adc_lock);
280 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
284 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
285 ezx_pcap_read(pcap, PCAP_REG_ADR, &tmp);
289 pcap->adc_queue[pcap->adc_head] = NULL;
290 pcap->adc_head = (pcap->adc_head + 1) & (PCAP_ADC_MAXQ - 1);
291 spin_unlock(&pcap->adc_lock);
298 pcap_adc_trigger(pcap);
303 int pcap_adc_async(struct pcap_chip *pcap, u8 bank, u32 flags, u8 ch[],
321 spin_lock_irqsave(&pcap->adc_lock, irq_flags);
322 if (pcap->adc_queue[pcap->adc_tail]) {
323 spin_unlock_irqrestore(&pcap->adc_lock, irq_flags);
327 pcap->adc_queue[pcap->adc_tail] = req;
328 pcap->adc_tail = (pcap->adc_tail + 1) & (PCAP_ADC_MAXQ - 1);
329 spin_unlock_irqrestore(&pcap->adc_lock, irq_flags);
332 pcap_adc_trigger(pcap);
347 int pcap_adc_sync(struct pcap_chip *pcap, u8 bank, u32 flags, u8 ch[],
354 ret = pcap_adc_async(pcap, bank, flags, ch, pcap_adc_sync_cb,
373 static int pcap_add_subdev(struct pcap_chip *pcap,
383 pdev->dev.parent = &pcap->spi->dev;
395 struct pcap_chip *pcap = spi_get_drvdata(spi);
403 spin_lock_irqsave(&pcap->adc_lock, flags);
405 kfree(pcap->adc_queue[i]);
406 spin_unlock_irqrestore(&pcap->adc_lock, flags);
409 for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++)
412 destroy_workqueue(pcap->workqueue);
418 struct pcap_chip *pcap;
426 pcap = devm_kzalloc(&spi->dev, sizeof(*pcap), GFP_KERNEL);
427 if (!pcap) {
432 spin_lock_init(&pcap->io_lock);
433 spin_lock_init(&pcap->adc_lock);
434 INIT_WORK(&pcap->isr_work, pcap_isr_work);
435 INIT_WORK(&pcap->msr_work, pcap_msr_work);
436 spi_set_drvdata(spi, pcap);
445 pcap->spi = spi;
448 pcap->irq_base = pdata->irq_base;
449 pcap->workqueue = create_singlethread_workqueue("pcapd");
450 if (!pcap->workqueue) {
452 dev_err(&spi->dev, "can't create pcap thread\n");
458 ezx_pcap_write(pcap, PCAP_REG_INT_SEL,
462 for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++) {
464 irq_set_chip_data(i, pcap);
469 ezx_pcap_write(pcap, PCAP_REG_MSR, PCAP_MASK_ALL_INTERRUPT);
470 ezx_pcap_write(pcap, PCAP_REG_ISR, PCAP_CLEAR_INTERRUPT_REGISTER);
471 pcap->msr = PCAP_MASK_ALL_INTERRUPT;
474 irq_set_chained_handler_and_data(spi->irq, pcap_irq_handler, pcap);
478 adc_irq = pcap_to_irq(pcap, (pdata->config & PCAP_SECOND_PORT) ?
482 pcap);
488 ret = pcap_add_subdev(pcap, &pdata->subdevs[i]);
495 pdata->init(pcap);
502 for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++)
505 destroy_workqueue(pcap->workqueue);
514 .name = "ezx-pcap",
533 MODULE_ALIAS("spi:ezx-pcap");