usb/cx231xx/cx231xx-avcore.c

54 	int status;
57 	status = cx231xx_read_i2c_data(dev, VERVE_I2C_ADDRESS,
60 	return status;
106 	int status;
109 	status = cx231xx_read_i2c_data(dev, AFE_DEVICE_ADDRESS,
112 	return status;
117 	int status = 0;
124 	status = afe_write_byte(dev, SUP_BLK_TUNE2, temp);
125 	if (status < 0)
126 		return status;
128 	status = afe_read_byte(dev, SUP_BLK_TUNE2, &afe_power_status);
129 	if (status < 0)
130 		return status;
134 	status = afe_write_byte(dev, SUP_BLK_TUNE1, temp);
135 	if (status < 0)
136 		return status;
138 	status = afe_write_byte(dev, SUP_BLK_PLL2, 0x0f);
139 	if (status < 0)
140 		return status;
144 		status = afe_write_byte(dev, SUP_BLK_PWRDN, 0x18);
145 		if (status < 0) {
152 		status = afe_read_byte(dev, SUP_BLK_PWRDN, &afe_power_status);
154 		if (status < 0) {
165 			status = -1;
170 	if (status < 0)
171 		return status;
174 	status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x40);
175 	if (status < 0)
176 		return status;
181 	status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x00);
183 	return status;
188 	int status = 0;
191 	status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, 0x00);
192 	status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, 0x00);
193 	status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, 0x00);
196 	status = afe_write_byte(dev, ADC_COM_QUANT, 0x02);
199 	status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x17);
200 	status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x17);
201 	status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x17);
204 	status = afe_write_byte(dev, ADC_CAL_ATEST_CH1, 0x10);
205 	status = afe_write_byte(dev, ADC_CAL_ATEST_CH2, 0x10);
206 	status = afe_write_byte(dev, ADC_CAL_ATEST_CH3, 0x10);
210 	status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x07);
211 	status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x07);
212 	status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x07);
215 	status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH1, 0xf0);
216 	status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH2, 0xf0);
217 	status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, 0xf0);
220 	status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8,
222 	status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8,
224 	status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8,
228 	status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH1, 0x03);
229 	status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH2, 0x03);
230 	status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, 0x03);
232 	return status;
238 	int status = 0;
240 	status = afe_read_byte(dev, ADC_PWRDN_CLAMP_CH2, &c_value);
242 	status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, c_value);
244 	return status;
261 	int status = 0;
265 		status = afe_read_byte(dev, ADC_INPUT_CH1, &value);
269 		status = afe_write_byte(dev, ADC_INPUT_CH1, value);
273 		status = afe_read_byte(dev, ADC_INPUT_CH2, &value);
277 		status = afe_write_byte(dev, ADC_INPUT_CH2, value);
283 		status = afe_read_byte(dev, ADC_INPUT_CH3, &value);
287 		status = afe_write_byte(dev, ADC_INPUT_CH3, value);
290 	return status;
295 	int status = 0;
307 		status = cx231xx_afe_setup_AFE_for_baseband(dev);
322 		status = cx231xx_afe_adjust_ref_count(dev,
327 	return status;
334 	int status = 0;
354 				status = afe_write_byte(dev, SUP_BLK_PWRDN,
357 				status |= afe_read_byte(dev, SUP_BLK_PWRDN,
359 				if (status < 0)
363 			status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
365 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
367 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
370 			status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
372 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
374 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
377 			status |= afe_read_byte(dev, SUP_BLK_PWRDN,
382 			status |= afe_write_byte(dev, SUP_BLK_PWRDN,
387 				status = afe_write_byte(dev, SUP_BLK_PWRDN,
390 				status |= afe_read_byte(dev, SUP_BLK_PWRDN,
392 				if (status < 0)
396 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
398 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
400 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
404 			status = -1;
411 				status = afe_write_byte(dev, SUP_BLK_PWRDN,
414 				status |= afe_read_byte(dev, SUP_BLK_PWRDN,
416 				if (status < 0)
420 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
422 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
424 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
427 			status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
429 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
431 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
434 			status |= afe_read_byte(dev, SUP_BLK_PWRDN,
439 			status |= afe_write_byte(dev, SUP_BLK_PWRDN,
444 				status = afe_write_byte(dev, SUP_BLK_PWRDN,
447 				status |= afe_read_byte(dev, SUP_BLK_PWRDN,
449 				if (status < 0)
453 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
455 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
457 			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
461 			status = -1;
465 	return status;
472 	int status = 0;
477 		status = afe_read_byte(dev, ADC_INPUT_CH3, &input_mode);
478 		status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3,
481 		status = afe_read_byte(dev, ADC_INPUT_CH1, &input_mode);
482 		status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH1,
505 	status = cx231xx_afe_init_super_block(dev, dev->afe_ref_count);
507 	return status;
521 	int status;
524 	status = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS,
527 	return status;
544 	int status = 0;
545 	status = vid_blk_read_byte(dev, DL_CTL_ADDRESS_LOW, &temp);
546 	if (status < 0)
547 		return status;
555 	int status = 0;
563 			status = cx231xx_set_power_mode(dev,
565 			if (status < 0) {
568 					__func__, status);
569 				return status;
572 		status = cx231xx_set_decoder_video_input(dev,
581 			status = cx231xx_set_power_mode(dev,
583 			if (status < 0) {
586 					__func__, status);
587 				return status;
596 			status = cx231xx_set_decoder_video_input(dev,
602 				status = cx231xx_set_decoder_video_input(dev,
606 				status = cx231xx_set_decoder_video_input(dev,
622 	return status;
628 	int status = 0;
632 		status = cx231xx_afe_adjust_ref_count(dev, pin_type);
633 		if (status < 0) {
636 				__func__, status);
637 			return status;
642 	status = cx231xx_afe_set_input_mux(dev, input);
643 	if (status < 0) {
646 			__func__, status);
647 		return status;
652 		status = vid_blk_read_word(dev, AFE_CTRL, &value);
660 		status = vid_blk_write_word(dev, AFE_CTRL, value);
662 		status = vid_blk_read_word(dev, OUT_CTRL1, &value);
664 		status = vid_blk_write_word(dev, OUT_CTRL1, value);
667 		status = cx231xx_read_modify_write_i2c_dword(dev,
674 		status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
675 		if (status < 0) {
678 				__func__, status);
679 			return status;
683 		status = vid_blk_read_word(dev, DFE_CTRL1, &value);
692 		status = vid_blk_write_word(dev, DFE_CTRL1, value);
695 		status = cx231xx_read_modify_write_i2c_dword(dev,
701 		status = cx231xx_read_modify_write_i2c_dword(dev,
709 		status = vid_blk_read_word(dev, AFE_CTRL, &value);
716 		status = vid_blk_write_word(dev, AFE_CTRL, value);
719 		status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
720 		if (status < 0) {
723 				__func__, status);
724 			return status;
728 		status = vid_blk_read_word(dev, DFE_CTRL1, &value);
737 		status = vid_blk_write_word(dev, DFE_CTRL1, value);
740 		status =  cx231xx_read_modify_write_i2c_dword(dev,
746 		status = cx231xx_read_modify_write_i2c_dword(dev,
753 		status = vid_blk_read_word(dev, AFE_CTRL, &value);
761 		status = vid_blk_write_word(dev, AFE_CTRL, value);
763 		status = cx231xx_afe_set_mode(dev, AFE_MODE_BASEBAND);
772 			status = vid_blk_read_word(dev, AFE_CTRL, &value);
780 			status = vid_blk_write_word(dev, AFE_CTRL, value);
782 			status = vid_blk_read_word(dev, OUT_CTRL1, &value);
784 			status = vid_blk_write_word(dev, OUT_CTRL1, value);
787 			status = cx231xx_read_modify_write_i2c_dword(dev,
793 			status = cx231xx_dif_set_standard(dev,
795 			if (status < 0) {
798 				       __func__, status);
799 				return status;
803 			status = vid_blk_read_word(dev, DFE_CTRL1, &value);
812 			status = vid_blk_write_word(dev, DFE_CTRL1, value);
815 			status = cx231xx_read_modify_write_i2c_dword(dev,
821 			status = cx231xx_read_modify_write_i2c_dword(dev,
830 			status = cx231xx_dif_set_standard(dev, dev->norm);
831 			if (status < 0) {
834 					__func__, status);
835 				return status;
839 			status = vid_blk_read_word(dev, DIF_MISC_CTRL, &value);
845 			status = vid_blk_write_word(dev, DIF_MISC_CTRL, value);
848 			status = vid_blk_read_word(dev, DFE_CTRL1, &value);
858 			status = vid_blk_write_word(dev, DFE_CTRL1, value);
867 			status = vid_blk_write_word(dev, DFE_CTRL1, value);
870 			status = vid_blk_read_word(dev, PIN_CTRL, &value);
874 			status = vid_blk_write_word(dev, PIN_CTRL, value);
877 			status = cx231xx_read_modify_write_i2c_dword(dev,
883 			status = cx231xx_read_modify_write_i2c_dword(dev,
889 			status = cx231xx_read_modify_write_i2c_dword(dev,
900 			status = vid_blk_read_word(dev, AFE_CTRL, &value);
908 			status = vid_blk_write_word(dev, AFE_CTRL, value);
911 				status = vid_blk_read_word(dev, PIN_CTRL,
913 				status = vid_blk_write_word(dev, PIN_CTRL,
924 	status = cx231xx_read_modify_write_i2c_dword(dev,
929 	status = vid_blk_read_word(dev, OUT_CTRL1, &value);
932 		status = vid_blk_write_word(dev, OUT_CTRL1, value);
935 	return status;
974 	int status = 0;
980 	status = vid_blk_write_word(dev, DFE_CTRL3, 0xCD3F0280);
987 		status = cx231xx_read_modify_write_i2c_dword(dev,
991 		status = cx231xx_read_modify_write_i2c_dword(dev,
996 		status = cx231xx_read_modify_write_i2c_dword(dev,
1002 		status = cx231xx_read_modify_write_i2c_dword(dev,
1011 		status =  cx231xx_read_modify_write_i2c_dword(dev,
1015 		status = cx231xx_read_modify_write_i2c_dword(dev,
1022 		status = cx231xx_read_modify_write_i2c_dword(dev,
1030 		status = cx231xx_read_modify_write_i2c_dword(dev,
1038 		status = cx231xx_read_modify_write_i2c_dword(dev,
1042 		status = cx231xx_read_modify_write_i2c_dword(dev,
1049 		status = cx231xx_read_modify_write_i2c_dword(dev,
1057 		status = cx231xx_read_modify_write_i2c_dword(dev,
1066 	return status;
1087 	int status = 0;
1095 		status = cx231xx_i2s_blk_set_audio_input(dev, input);
1102 	status = cx231xx_set_audio_decoder_input(dev, ainput);
1104 	return status;
1111 	int status;
1116 	status = vid_blk_read_byte(dev, GENERAL_CTL, &gen_ctrl);
1118 	status = vid_blk_write_byte(dev, GENERAL_CTL, gen_ctrl);
1125 		status = vid_blk_write_word(dev, AUD_IO_CTRL, value);
1130 		status = vid_blk_read_word(dev, AC97_CTL, &dwval);
1132 		status = vid_blk_write_word(dev, AC97_CTL,
1136 		status = vid_blk_write_word(dev, BAND_OUT_SEL,
1143 		status = vid_blk_write_word(dev, DL_CTL, 0x3000001);
1144 		status = vid_blk_write_word(dev, PATH1_CTL1, 0x00063073);
1147 		status = vid_blk_read_word(dev, PATH1_VOL_CTL, &dwval);
1148 		status = vid_blk_write_word(dev, PATH1_VOL_CTL,
1152 		status = vid_blk_read_word(dev, PATH1_SC_CTL, &dwval);
1153 		status = vid_blk_write_word(dev, PATH1_SC_CTL,
1159 		status = stopAudioFirmware(dev);
1161 		status = vid_blk_write_word(dev, BAND_OUT_SEL,
1177 		status = vid_blk_write_word(dev, AUD_IO_CTRL,
1184 		status = vid_blk_write_word(dev, PATH1_CTL1, 0x1F063870);
1187 		status = vid_blk_write_word(dev, PATH1_CTL1, 0x00063870);
1189 		status = restartAudioFirmware(dev);
1194 			status = cx231xx_read_modify_write_i2c_dword(dev,
1202 			status = cx231xx_read_modify_write_i2c_dword(dev,
1236 		status = vid_blk_write_word(dev, PATH1_CTL1, 0x1F011012);
1241 	status = vid_blk_read_byte(dev, GENERAL_CTL, &gen_ctrl);
1243 	status = vid_blk_write_byte(dev, GENERAL_CTL, gen_ctrl);
1245 	return status;
1254 	int status = 0;
1256 	status = vid_blk_read_word(dev, PIN_CTRL, &value);
1258 	status = vid_blk_write_word(dev, PIN_CTRL, value);
1260 	return status;
1266 	int status;
1269 	status = cx231xx_set_gpio_direction(dev,
1274 	status = cx231xx_set_gpio_value(dev,
1278 	if (status < 0)
1279 		return status;
1287 	int status = 0;
1297 	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER,
1299 	if (status < 0)
1300 		return status;
1313 	status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1316 	/* remember status of the switch for usage in is_tuner */
1317 	if (status >= 0)
1320 	return status;
1328 	u8 status = 0;
1335 	status = vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value);
1337 	status = vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL,  &value);
1654 	int status = 0;
1660 		status = cx231xx_reg_mask_write(dev,
1664 		status = cx231xx_reg_mask_write(dev,
1668 		status = cx231xx_reg_mask_write(dev,
1672 		status = cx231xx_reg_mask_write(dev,
1678 			status = cx231xx_reg_mask_write(dev,
1682 			status = cx231xx_reg_mask_write(dev,
1687 			status = cx231xx_reg_mask_write(dev,
1691 			status = cx231xx_reg_mask_write(dev,
1695 			status = cx231xx_reg_mask_write(dev,
1703 			status = cx231xx_reg_mask_write(dev,
1707 			status = cx231xx_reg_mask_write(dev,
1712 			status = cx231xx_reg_mask_write(dev,
1716 			status = cx231xx_reg_mask_write(dev,
1723 			status = cx231xx_reg_mask_write(dev,
1727 			status = cx231xx_reg_mask_write(dev,
1732 			status = cx231xx_reg_mask_write(dev,
1736 			status = cx231xx_reg_mask_write(dev,
1742 	return status;
1747 	int status = 0;
1753 	status = vid_blk_read_word(dev, DIF_MISC_CTRL, &dif_misc_ctrl_value);
1777 	status = cx231xx_dif_configure_C2HH_for_low_IF(dev, dev->active_mode,
1783 		status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, 0xDF7DF83);
1784 		status = vid_blk_read_word(dev, DIF_MISC_CTRL,
1787 		status = vid_blk_write_word(dev, DIF_MISC_CTRL,
1790 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1792 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1794 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1796 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1798 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1800 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1802 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1804 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1806 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1809 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1812 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1815 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1818 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1820 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1823 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1826 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1829 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1835 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1837 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1839 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1841 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1843 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1845 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1847 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1849 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1851 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1854 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1857 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1860 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1863 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1865 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1868 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1871 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1874 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1881 		status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0xFF01FF0C);
1882 		status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xbd038c85);
1883 		status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1db4640a);
1884 		status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800);
1885 		status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C1380);
1886 		status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT,
1888 		status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT,
1890 		status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL,
1892 		status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE,
1894 		status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL, 0x012c405d);
1895 		status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL,
1897 		status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC,
1899 		status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL,
1901 		status = vid_blk_write_word(dev, DIF_SOFT_RST_CTRL_REVB,
1908 		status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0xFF01FF0C);
1909 		status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xbd038c85);
1910 		status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1db4640a);
1911 		status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800);
1912 		status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C1380);
1913 		status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT,
1915 		status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT,
1917 		status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL,
1919 		status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE,
1921 		status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL,
1923 		status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL,
1925 		status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC,
1927 		status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL,
1929 		status = vid_blk_write_word(dev, DIF_SOFT_RST_CTRL_REVB,
1938 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1940 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1942 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1944 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1946 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1948 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1950 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1952 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1954 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1957 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1960 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1963 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1965 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1968 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1971 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1974 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1976 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1985 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1987 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1989 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1991 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1993 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1995 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1997 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
1999 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2001 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2004 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2007 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2010 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2012 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2015 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2018 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2021 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2023 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2041 		status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0x6503BC0C);
2042 		status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xBD038C85);
2043 		status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1DB4640A);
2044 		status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800);
2045 		status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C0380);
2046 		status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT,
2048 		status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT,
2050 		status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL,
2052 		status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE,
2054 		status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL, 0x01296e1f);
2056 		status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL,
2058 		status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC,
2060 		status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL,
2063 		status = vid_blk_write_word(dev, DIF_AGC_CTRL_IF, 0xC2262600);
2064 		status = vid_blk_write_word(dev, DIF_AGC_CTRL_INT,
2066 		status = vid_blk_write_word(dev, DIF_AGC_CTRL_RF, 0xC2262600);
2073 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2075 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2077 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2079 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2081 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2083 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2085 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2087 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2089 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2092 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2095 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2098 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2101 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2103 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2106 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2109 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2112 		status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
2130 	status = vid_blk_write_word(dev, DIF_MISC_CTRL, dif_misc_ctrl_value);
2132 	return status;
2137 	int status = 0;
2141 	status = vid_blk_read_word(dev, DIF_AGC_IF_REF, &dwval);
2145 	status = vid_blk_write_word(dev, DIF_AGC_IF_REF, dwval);
2147 	return status;
2152 	int status = 0;
2158 	status = vid_blk_read_word(dev, DIF_AGC_IF_REF, &dwval);
2176 	status = vid_blk_write_word(dev, DIF_AGC_IF_REF, dwval);
2178 	return status == sizeof(dwval) ? 0 : -EIO;
2186 	int status = 0;
2189 	status = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
2193 	status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
2196 	status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
2199 	return status;
2205 	int status = 0;
2209 		status = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
2212 		status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
2215 		status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
2219 	return status;
2225 	int status = 0;
2229 		status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
2231 		status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
2241 	return status;
2251 	int status = 0;
2261 	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value,
2263 	if (status < 0)
2264 		return status;
2278 		status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
2287 		status =
2297 		status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
2311 		status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
2321 			status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
2332 			status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
2342 			status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
2353 			status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
2376 			status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
2386 			status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
2396 			status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
2407 		status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
2417 			status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
2446 		status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
2452 	status = cx231xx_afe_update_power_control(dev, mode);
2455 	status = cx231xx_i2s_blk_update_power_control(dev, mode);
2457 	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value,
2460 	return status;
2467 	int status = 0;
2469 	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,
2471 	if (status > 0)
2472 		return status;
2481 	status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
2484 	return status;
2494 	int status = 0;
2497 	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET,
2499 	if (status < 0)
2500 		return status;
2509 	status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET,
2512 	return status;
2519 	int status = 0;
2522 	status =
2524 	if (status < 0)
2525 		return status;
2534 	status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET,
2537 	return status;
2542 	int status = 0;
2551 			status =
2558 			status = cx231xx_mode_register(dev, TS_MODE_REG, 0x300);
2564 			status =
2571 			status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
2584 				status = cx231xx_mode_register(dev,
2591 				status = cx231xx_write_ctrl_reg(dev,
2599 				status = cx231xx_write_ctrl_reg(dev,
2604 				status = cx231xx_mode_register(dev,
2606 				status = cx231xx_mode_register(dev,
2615 			status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
2616 			status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400);
2620 		status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101);
2623 	return status;
2683 	int status = 0;
2686 	status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&gpio_val, 4, 0, 0);
2688 	return status;
2694 	int status = 0;
2696 	status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&tmp, 4, 0, 1);
2699 	return status;
2716 	int status = 0;
2729 	status = cx231xx_set_gpio_bit(dev, value, dev->gpio_val);
2734 	return status;
2750 	int status = 0;
2762 		status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2776 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
2778 	return status;
2786 	int status = 0;
2794 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
2795 	if (status < 0)
2802 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
2803 	if (status < 0)
2810 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
2811 	if (status < 0)
2814 	return status;
2819 	int status = 0;
2828 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
2829 	if (status < 0)
2836 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
2837 	if (status < 0)
2845 	status =
2847 	if (status < 0)
2850 	return status;
2855 	int status = 0;
2867 			status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2872 			status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2877 			status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2883 			status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2888 			status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2893 			status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2897 	return status;
2903 	int status = 0;
2912 		status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2917 		status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2922 		status = cx231xx_get_gpio_bit(dev, dev->gpio_dir,
2934 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
2939 	return status;
2944 	int status = 0;
2955 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
2959 		status = cx231xx_get_gpio_bit(dev, dev->gpio_dir,
2976 	status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, &dev->gpio_val);
2981 		status = 0;
2992 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
2994 	return status;
2999 	int status = 0;
3003 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
3008 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
3012 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
3016 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
3020 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
3022 	return status;
3027 	int status = 0;
3032 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
3036 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
3040 	status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
3042 	return status;
3053 	int status = 0;
3060 	status = cx231xx_gpio_i2c_start(dev);
3063 	status = cx231xx_gpio_i2c_write_byte(dev, (dev_addr << 1) + 1);
3066 	status = cx231xx_gpio_i2c_read_ack(dev);
3072 		status = cx231xx_gpio_i2c_read_byte(dev, &buf[i]);
3076 			status = cx231xx_gpio_i2c_write_ack(dev);
3081 	status = cx231xx_gpio_i2c_write_nak(dev);
3084 	status = cx231xx_gpio_i2c_end(dev);
3089 	return status;