media/rc/meson-ir-tx.c

3  * meson-ir-tx.c - Amlogic Meson IR TX driver
23 #define DRIVER_NAME	"meson-ir-tx"
79 static void meson_irtx_set_mod(struct meson_irtx *ir)
81 	unsigned int cnt = DIV_ROUND_CLOSEST(ir->clk_rate, ir->carrier);
82 	unsigned int pulse_cnt = DIV_ROUND_CLOSEST(cnt * ir->duty_cycle, 100);
85 	dev_dbg(ir->dev, "F_mod = %uHz, T_mod = %luns, duty_cycle = %u%%\n",
86 		ir->carrier, NSEC_PER_SEC / ir->clk_rate * cnt,
90 	       ir->reg_base + IRB_ADDR1);
93 static void meson_irtx_setup(struct meson_irtx *ir, unsigned int clk_nr)
102 	       ir->reg_base + IRB_ADDR0);
103 	meson_irtx_set_mod(ir);
104 	writel(readl(ir->reg_base + IRB_ADDR0) & ~IRB_INIT_HIGH,
105 	       ir->reg_base + IRB_ADDR0);
107 	       ir->reg_base + IRB_ADDR3);
108 	writel(readl(ir->reg_base + IRB_ADDR0) | IRB_ENABLE,
109 	       ir->reg_base + IRB_ADDR0);
112 static u32 meson_irtx_prepare_pulse(struct meson_irtx *ir, unsigned int time)
116 	unsigned int tb_us = DIV_ROUND_CLOSEST(USEC_PER_SEC, ir->carrier);
123 static u32 meson_irtx_prepare_space(struct meson_irtx *ir, unsigned int time)
145 static void meson_irtx_send_buffer(struct meson_irtx *ir)
150 	while (ir->buf_head < ir->buf_len && nr < max_fifo_level) {
151 		writel(ir->buf[ir->buf_head], ir->reg_base + IRB_ADDR2);
153 		ir->buf_head++;
158 static bool meson_irtx_check_buf(struct meson_irtx *ir,
170 			max_tb_us = USEC_PER_SEC / ir->carrier;
181 static void meson_irtx_fill_buf(struct meson_irtx *ir, u32 *dst_buf,
188 			dst_buf[i] = meson_irtx_prepare_pulse(ir, src_buf[i]);
190 			dst_buf[i] = meson_irtx_prepare_space(ir, src_buf[i]);
197 	struct meson_irtx *ir = data;
199 	writel(readl(ir->reg_base + IRB_ADDR3) & ~IRB_FIFO_THD_PENDING,
200 	       ir->reg_base + IRB_ADDR3);
202 	if (completion_done(&ir->completion))
205 	spin_lock_irqsave(&ir->lock, flags);
206 	if (ir->buf_head < ir->buf_len)
207 		meson_irtx_send_buffer(ir);
209 		complete(&ir->completion);
210 	spin_unlock_irqrestore(&ir->lock, flags);
217 	struct meson_irtx *ir = rc->priv;
222 	ir->carrier = carrier;
223 	meson_irtx_set_mod(ir);
230 	struct meson_irtx *ir = rc->priv;
232 	ir->duty_cycle = duty_cycle;
233 	meson_irtx_set_mod(ir);
238 static void meson_irtx_update_buf(struct meson_irtx *ir, u32 *buf,
241 	ir->buf = buf;
242 	ir->buf_len = len;
243 	ir->buf_head = head;
250 	struct meson_irtx *ir = rc->priv;
254 	if (!meson_irtx_check_buf(ir, buf, len))
261 	meson_irtx_fill_buf(ir, tx_buf, buf, len);
262 	dev_dbg(ir->dev, "TX buffer filled, length = %u\n", len);
264 	spin_lock_irqsave(&ir->lock, flags);
265 	meson_irtx_update_buf(ir, tx_buf, len, 0);
266 	reinit_completion(&ir->completion);
267 	meson_irtx_send_buffer(ir);
268 	spin_unlock_irqrestore(&ir->lock, flags);
270 	if (!wait_for_completion_timeout(&ir->completion,
274 	spin_lock_irqsave(&ir->lock, flags);
275 	kfree(ir->buf);
276 	meson_irtx_update_buf(ir, NULL, 0, 0);
277 	spin_unlock_irqrestore(&ir->lock, flags);
282 static int meson_irtx_mod_clock_probe(struct meson_irtx *ir,
285 	struct device_node *np = ir->dev->of_node;
291 	clock = devm_clk_get(ir->dev, "xtal");
296 	ir->clk_rate = clk_get_rate(clock) / 3;
298 	if (ir->clk_rate < IRB_MOD_1US_CLK_RATE) {
300 		ir->clk_rate = IRB_MOD_1US_CLK_RATE;
303 	dev_info(ir->dev, "F_clk = %luHz\n", ir->clk_rate);
311 	struct meson_irtx *ir;
317 	ir = devm_kzalloc(dev, sizeof(*ir), GFP_KERNEL);
318 	if (!ir)
321 	ir->reg_base = devm_platform_ioremap_resource(pdev, 0);
322 	if (IS_ERR(ir->reg_base))
323 		return PTR_ERR(ir->reg_base);
329 	ir->dev = dev;
330 	ir->carrier = MIRTX_DEFAULT_CARRIER;
331 	ir->duty_cycle = MIRTX_DEFAULT_DUTY_CYCLE;
332 	init_completion(&ir->completion);
333 	spin_lock_init(&ir->lock);
335 	ret = meson_irtx_mod_clock_probe(ir, &clk_nr);
339 	meson_irtx_setup(ir, clk_nr);
344 			       DRIVER_NAME, ir);
354 	rc->priv = ir;
371 		.compatible = "amlogic,meson-g12a-ir-tx",