platform/verisilicon/rockchip_vpu_hw.c

367 	vepu_write(vpu, 0, H1_REG_INTERRUPT);
368 	vepu_write(vpu, 0, H1_REG_AXI_CTRL);
403 	vepu_write(vpu, 0, VEPU_REG_INTERRUPT);
404 	vepu_write(vpu, 0, VEPU_REG_AXI_CTRL);
470 	vepu_write(vpu, H1_REG_INTERRUPT_DIS_BIT, H1_REG_INTERRUPT);
471 	vepu_write(vpu, 0, H1_REG_ENC_CTRL);
472 	vepu_write(vpu, 0, H1_REG_AXI_CTRL);
488 	vepu_write(vpu, VEPU_REG_INTERRUPT_DIS_BIT, VEPU_REG_INTERRUPT);
489 	vepu_write(vpu, 0, VEPU_REG_ENCODE_START);
490 	vepu_write(vpu, 0, VEPU_REG_AXI_CTRL);