platform/verisilicon/hantro_g2_hevc_dec.c

14 	const struct hantro_hevc_dec_ctrls *ctrls = &ctx->hevc_dec.ctrls;
17 	u16 *p = (u16 *)((u8 *)ctx->hevc_dec.tile_sizes.cpu);
108 	const struct hantro_hevc_dec_ctrls *ctrls = &ctx->hevc_dec.ctrls;
143 	const struct hantro_hevc_dec_ctrls *ctrls = &ctx->hevc_dec.ctrls;
288 	const struct hantro_hevc_dec_ctrls *ctrls = &ctx->hevc_dec.ctrls;
365 	const struct hantro_hevc_dec_ctrls *ctrls = &ctx->hevc_dec.ctrls;
508 	hantro_write_addr(vpu, G2_TILE_SIZES_ADDR, ctx->hevc_dec.tile_sizes.dma);
509 	hantro_write_addr(vpu, G2_TILE_FILTER_ADDR, ctx->hevc_dec.tile_filter.dma);
510 	hantro_write_addr(vpu, G2_TILE_SAO_ADDR, ctx->hevc_dec.tile_sao.dma);
511 	hantro_write_addr(vpu, G2_TILE_BSD_ADDR, ctx->hevc_dec.tile_bsd.dma);
517 	const struct hantro_hevc_dec_ctrls *ctrls = &ctx->hevc_dec.ctrls;
520 	u8 *p = ((u8 *)ctx->hevc_dec.scaling_lists.cpu);
561 	hantro_write_addr(vpu, G2_HEVC_SCALING_LIST_ADDR, ctx->hevc_dec.scaling_lists.dma);