Lines Matching refs:irec
75 if (channel->irec && readl(channel->irec + DMA_PRDS_TPENABLE))
91 if (unlikely(!channel || !channel->irec))
96 wp = readl(channel->irec + DMA_PRDS_BUSWP_TP(0));
97 rp = readl(channel->irec + DMA_PRDS_BUSRP_TP(0));
131 writel(channel->back_buffer_busaddr, channel->irec +
134 writel(wp, channel->irec + DMA_PRDS_BUSRP_TP(0));
229 writel(channel->back_buffer_busaddr, channel->irec +
233 writel(tmp, channel->irec + DMA_PRDS_BUSTOP_TP(0));
235 writel(channel->back_buffer_busaddr, channel->irec +
243 writel(0x1, channel->irec + DMA_PRDS_TPENABLE);
305 writel(0, channel->irec + DMA_PRDS_TPENABLE);
327 channel->irec + DMA_PRDS_BUSBASE_TP(0));
330 writel(tmp, channel->irec + DMA_PRDS_BUSTOP_TP(0));
333 channel->irec + DMA_PRDS_BUSWP_TP(0));
569 /* Place the FIFO's at the end of the irec descriptors */
608 tsin->irec = fei->io + DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET +
614 tsin->irec += (tsin->tsin_id * DMA_PRDS_SIZE);
616 writel(tsin->fifo, tsin->irec + DMA_PRDS_MEMBASE);
618 writel(tsin->fifo + FIFO_LEN - 1, tsin->irec + DMA_PRDS_MEMTOP);
620 writel((188 + 7)&~7, tsin->irec + DMA_PRDS_PKTSIZE);
622 writel(0x1, tsin->irec + DMA_PRDS_TPENABLE);
626 writel(tsin->back_buffer_busaddr, tsin->irec + DMA_PRDS_BUSBASE_TP(0));
629 writel(tmp, tsin->irec + DMA_PRDS_BUSTOP_TP(0));
631 writel(tsin->back_buffer_busaddr, tsin->irec + DMA_PRDS_BUSWP_TP(0));
632 writel(tsin->back_buffer_busaddr, tsin->irec + DMA_PRDS_BUSRP_TP(0));