samsung/s5p-mfc/s5p_mfc_opr_v5.c

224 	ctx->shm.size = buf_size->shm;
225 	ret = s5p_mfc_alloc_priv_buf(dev, BANK_L_CTX, &ctx->shm);
233 	ctx->shm.ofs = ctx->shm.dma - dev->dma_base[BANK_L_CTX];
234 	BUG_ON(ctx->shm.ofs & ((1 << MFC_BANK1_ALIGN_ORDER) - 1));
236 	memset(ctx->shm.virt, 0, buf_size->shm);
245 	s5p_mfc_release_priv_buf(ctx->dev, &ctx->shm);
263 	*(u32 *)(ctx->shm.virt + ofs) = data;
271 	return *(u32 *)(ctx->shm.virt + ofs);
358 	mfc_write(dev, ctx->shm.ofs, S5P_FIMV_SI_CH0_HOST_WR_ADR);
681 	unsigned int shm;
746 	shm = s5p_mfc_read_info_v5(ctx, EXT_ENC_CONTROL);
748 	shm &= ~(0x1 << 3);
749 	shm |= (p->seq_hdr_mode << 3);
751 	shm &= ~(0x3 << 1);
752 	shm |= (p->frame_skip_mode << 1);
753 	s5p_mfc_write_info_v5(ctx, shm, EXT_ENC_CONTROL);
765 	unsigned int shm;
866 		shm = s5p_mfc_read_info_v5(ctx, P_B_FRAME_QP);
867 		shm &= ~(0xFFF);
868 		shm |= ((p_264->rc_b_frame_qp & 0x3F) << 6);
869 		shm |= (p_264->rc_p_frame_qp & 0x3F);
870 		s5p_mfc_write_info_v5(ctx, shm, P_B_FRAME_QP);
873 	shm = s5p_mfc_read_info_v5(ctx, EXT_ENC_CONTROL);
875 	shm &= ~(0x1 << 15);
876 	shm |= (p_264->vui_sar << 1);
877 	s5p_mfc_write_info_v5(ctx, shm, EXT_ENC_CONTROL);
880 		shm = s5p_mfc_read_info_v5(ctx, SAMPLE_ASPECT_RATIO_IDC);
881 		shm &= ~(0xFF);
882 		shm |= p_264->vui_sar_idc;
883 		s5p_mfc_write_info_v5(ctx, shm, SAMPLE_ASPECT_RATIO_IDC);
886 			shm = s5p_mfc_read_info_v5(ctx, EXTENDED_SAR);
887 			shm &= ~(0xFFFFFFFF);
888 			shm |= p_264->vui_ext_sar_width << 16;
889 			shm |= p_264->vui_ext_sar_height;
890 			s5p_mfc_write_info_v5(ctx, shm, EXTENDED_SAR);
894 	shm = s5p_mfc_read_info_v5(ctx, H264_I_PERIOD);
896 	shm &= ~(0x1 << 16);
897 	shm |= (p_264->open_gop << 16);
900 		shm &= ~(0xFFFF);
901 		shm |= p_264->open_gop_size;
903 	s5p_mfc_write_info_v5(ctx, shm, H264_I_PERIOD);
905 	shm = s5p_mfc_read_info_v5(ctx, EXT_ENC_CONTROL);
909 		shm &= ~(0xFFFF << 16);
910 		shm |= (p_264->cpb_size << 16);
912 	s5p_mfc_write_info_v5(ctx, shm, EXT_ENC_CONTROL);
922 	unsigned int shm;
945 		shm = s5p_mfc_read_info_v5(ctx, P_B_FRAME_QP);
946 		shm &= ~(0xFFF);
947 		shm |= ((p_mpeg4->rc_b_frame_qp & 0x3F) << 6);
948 		shm |= (p_mpeg4->rc_p_frame_qp & 0x3F);
949 		s5p_mfc_write_info_v5(ctx, shm, P_B_FRAME_QP);
958 			shm = s5p_mfc_read_info_v5(ctx, RC_VOP_TIMING);
959 			shm &= ~(0xFFFFFFFF);
960 			shm |= (1UL << 31);
961 			shm |= ((p->rc_framerate_num & 0x7FFF) << 16);
962 			shm |= (p->rc_framerate_denom & 0xFFFF);
963 			s5p_mfc_write_info_v5(ctx, shm, RC_VOP_TIMING);
984 	shm = s5p_mfc_read_info_v5(ctx, EXT_ENC_CONTROL);
988 		shm &= ~(0xFFFF << 16);
989 		shm |= (p->vbv_size << 16);
991 	s5p_mfc_write_info_v5(ctx, shm, EXT_ENC_CONTROL);
1001 	unsigned int shm;
1006 		shm = s5p_mfc_read_info_v5(ctx, P_B_FRAME_QP);
1007 		shm &= ~(0xFFF);
1008 		shm |= (p_h263->rc_p_frame_qp & 0x3F);
1009 		s5p_mfc_write_info_v5(ctx, shm, P_B_FRAME_QP);
1033 	shm = s5p_mfc_read_info_v5(ctx, EXT_ENC_CONTROL);
1037 		shm &= ~(0xFFFF << 16);
1038 		shm |= (p->vbv_size << 16);
1040 	s5p_mfc_write_info_v5(ctx, shm, EXT_ENC_CONTROL);