Lines Matching refs:clocks
70 if (IS_ERR(is->clocks[i]))
72 clk_put(is->clocks[i]);
73 is->clocks[i] = ERR_PTR(-EINVAL);
82 is->clocks[i] = ERR_PTR(-EINVAL);
85 is->clocks[i] = clk_get(&is->pdev->dev, fimc_is_clocks[i]);
86 if (IS_ERR(is->clocks[i])) {
87 ret = PTR_ERR(is->clocks[i]);
104 ret = clk_set_parent(is->clocks[ISS_CLK_ACLK200],
105 is->clocks[ISS_CLK_ACLK200_DIV]);
109 ret = clk_set_parent(is->clocks[ISS_CLK_ACLK400MCUISP],
110 is->clocks[ISS_CLK_ACLK400MCUISP_DIV]);
114 ret = clk_set_rate(is->clocks[ISS_CLK_ISP_DIV0], ACLK_AXI_FREQUENCY);
118 ret = clk_set_rate(is->clocks[ISS_CLK_ISP_DIV1], ACLK_AXI_FREQUENCY);
122 ret = clk_set_rate(is->clocks[ISS_CLK_MCUISP_DIV0],
127 return clk_set_rate(is->clocks[ISS_CLK_MCUISP_DIV1],
136 if (IS_ERR(is->clocks[i]))
138 ret = clk_prepare_enable(is->clocks[i]);
143 clk_disable_unprepare(is->clocks[i]);
156 if (!IS_ERR(is->clocks[i])) {
157 clk_disable_unprepare(is->clocks[i]);