Lines Matching refs:rga

28 #include "rga-hw.h"
29 #include "rga.h"
37 struct rockchip_rga *rga = ctx->rga;
41 spin_lock_irqsave(&rga->ctrl_lock, flags);
43 rga->curr = ctx;
48 rga_hw_start(rga, vb_to_rga(src), vb_to_rga(dst));
50 spin_unlock_irqrestore(&rga->ctrl_lock, flags);
55 struct rockchip_rga *rga = prv;
58 intr = rga_read(rga, RGA_INT) & 0xf;
60 rga_mod(rga, RGA_INT, intr << 4, 0xf << 4);
64 struct rga_ctx *ctx = rga->curr;
68 rga->curr = NULL;
80 v4l2_m2m_job_finish(rga->m2m_dev, ctx->fh.m2m_ctx);
104 src_vq->lock = &ctx->rga->mutex;
105 src_vq->dev = ctx->rga->v4l2_dev.dev;
119 dst_vq->lock = &ctx->rga->mutex;
120 dst_vq->dev = ctx->rga->v4l2_dev.dev;
131 spin_lock_irqsave(&ctx->rga->ctrl_lock, flags);
146 spin_unlock_irqrestore(&ctx->rga->ctrl_lock, flags);
156 struct rockchip_rga *rga = ctx->rga;
175 v4l2_err(&rga->v4l2_dev, "%s failed\n", __func__);
365 struct rockchip_rga *rga = video_drvdata(file);
372 ctx->rga = rga;
382 if (mutex_lock_interruptible(&rga->mutex)) {
386 ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(rga->m2m_dev, ctx, &queue_init);
389 mutex_unlock(&rga->mutex);
403 mutex_unlock(&rga->mutex);
412 struct rockchip_rga *rga = ctx->rga;
414 mutex_lock(&rga->mutex);
423 mutex_unlock(&rga->mutex);
441 strscpy(cap->card, "rockchip-rga", sizeof(cap->card));
442 strscpy(cap->bus_info, "platform:rga", sizeof(cap->bus_info));
506 struct rockchip_rga *rga = ctx->rga;
520 v4l2_err(&rga->v4l2_dev, "queue (%d) bust\n", f->type);
543 v4l2_dbg(debug, 1, &rga->v4l2_dev,
550 v4l2_dbg(debug, 1, &rga->v4l2_dev,
611 struct rockchip_rga *rga = ctx->rga;
645 v4l2_dbg(debug, 1, &rga->v4l2_dev,
653 v4l2_dbg(debug, 1, &rga->v4l2_dev, "unsupported crop value.\n");
694 .name = "rockchip-rga",
703 static int rga_enable_clocks(struct rockchip_rga *rga)
707 ret = clk_prepare_enable(rga->sclk);
709 dev_err(rga->dev, "Cannot enable rga sclk: %d\n", ret);
713 ret = clk_prepare_enable(rga->aclk);
715 dev_err(rga->dev, "Cannot enable rga aclk: %d\n", ret);
719 ret = clk_prepare_enable(rga->hclk);
721 dev_err(rga->dev, "Cannot enable rga hclk: %d\n", ret);
728 clk_disable_unprepare(rga->aclk);
730 clk_disable_unprepare(rga->sclk);
735 static void rga_disable_clocks(struct rockchip_rga *rga)
737 clk_disable_unprepare(rga->sclk);
738 clk_disable_unprepare(rga->hclk);
739 clk_disable_unprepare(rga->aclk);
742 static int rga_parse_dt(struct rockchip_rga *rga)
746 core_rst = devm_reset_control_get(rga->dev, "core");
748 dev_err(rga->dev, "failed to get core reset controller\n");
752 axi_rst = devm_reset_control_get(rga->dev, "axi");
754 dev_err(rga->dev, "failed to get axi reset controller\n");
758 ahb_rst = devm_reset_control_get(rga->dev, "ahb");
760 dev_err(rga->dev, "failed to get ahb reset controller\n");
776 rga->sclk = devm_clk_get(rga->dev, "sclk");
777 if (IS_ERR(rga->sclk)) {
778 dev_err(rga->dev, "failed to get sclk clock\n");
779 return PTR_ERR(rga->sclk);
782 rga->aclk = devm_clk_get(rga->dev, "aclk");
783 if (IS_ERR(rga->aclk)) {
784 dev_err(rga->dev, "failed to get aclk clock\n");
785 return PTR_ERR(rga->aclk);
788 rga->hclk = devm_clk_get(rga->dev, "hclk");
789 if (IS_ERR(rga->hclk)) {
790 dev_err(rga->dev, "failed to get hclk clock\n");
791 return PTR_ERR(rga->hclk);
799 struct rockchip_rga *rga;
807 rga = devm_kzalloc(&pdev->dev, sizeof(*rga), GFP_KERNEL);
808 if (!rga)
811 rga->dev = &pdev->dev;
812 spin_lock_init(&rga->ctrl_lock);
813 mutex_init(&rga->mutex);
815 ret = rga_parse_dt(rga);
819 pm_runtime_enable(rga->dev);
821 rga->regs = devm_platform_ioremap_resource(pdev, 0);
822 if (IS_ERR(rga->regs)) {
823 ret = PTR_ERR(rga->regs);
833 ret = devm_request_irq(rga->dev, irq, rga_isr, 0,
834 dev_name(rga->dev), rga);
836 dev_err(rga->dev, "failed to request irq\n");
840 ret = dma_set_mask_and_coherent(rga->dev, DMA_BIT_MASK(32));
842 dev_err(rga->dev, "32-bit DMA not supported");
846 ret = v4l2_device_register(&pdev->dev, &rga->v4l2_dev);
851 v4l2_err(&rga->v4l2_dev, "Failed to allocate video device\n");
856 vfd->lock = &rga->mutex;
857 vfd->v4l2_dev = &rga->v4l2_dev;
859 video_set_drvdata(vfd, rga);
860 rga->vfd = vfd;
862 platform_set_drvdata(pdev, rga);
863 rga->m2m_dev = v4l2_m2m_init(&rga_m2m_ops);
864 if (IS_ERR(rga->m2m_dev)) {
865 v4l2_err(&rga->v4l2_dev, "Failed to init mem2mem device\n");
866 ret = PTR_ERR(rga->m2m_dev);
870 ret = pm_runtime_resume_and_get(rga->dev);
874 rga->version.major = (rga_read(rga, RGA_VERSION_INFO) >> 24) & 0xFF;
875 rga->version.minor = (rga_read(rga, RGA_VERSION_INFO) >> 20) & 0x0F;
877 v4l2_info(&rga->v4l2_dev, "HW Version: 0x%02x.%02x\n",
878 rga->version.major, rga->version.minor);
880 pm_runtime_put(rga->dev);
883 rga->cmdbuf_virt = dma_alloc_attrs(rga->dev, RGA_CMDBUF_SIZE,
884 &rga->cmdbuf_phy, GFP_KERNEL,
886 if (!rga->cmdbuf_virt) {
896 v4l2_err(&rga->v4l2_dev, "Failed to register video device\n");
900 v4l2_info(&rga->v4l2_dev, "Registered %s as /dev/%s\n",
906 dma_free_attrs(rga->dev, RGA_CMDBUF_SIZE, rga->cmdbuf_virt,
907 rga->cmdbuf_phy, DMA_ATTR_WRITE_COMBINE);
909 v4l2_m2m_release(rga->m2m_dev);
913 v4l2_device_unregister(&rga->v4l2_dev);
915 pm_runtime_disable(rga->dev);
922 struct rockchip_rga *rga = platform_get_drvdata(pdev);
924 dma_free_attrs(rga->dev, RGA_CMDBUF_SIZE, rga->cmdbuf_virt,
925 rga->cmdbuf_phy, DMA_ATTR_WRITE_COMBINE);
927 v4l2_info(&rga->v4l2_dev, "Removing\n");
929 v4l2_m2m_release(rga->m2m_dev);
930 video_unregister_device(rga->vfd);
931 v4l2_device_unregister(&rga->v4l2_dev);
933 pm_runtime_disable(rga->dev);
938 struct rockchip_rga *rga = dev_get_drvdata(dev);
940 rga_disable_clocks(rga);
947 struct rockchip_rga *rga = dev_get_drvdata(dev);
949 return rga_enable_clocks(rga);
959 .compatible = "rockchip,rk3288-rga",
962 .compatible = "rockchip,rk3399-rga",