renesas/vsp1/vsp1_drm.c

16 #include <media/vsp1.h>
18 #include "vsp1.h"
63 static int vsp1_du_insert_uif(struct vsp1_device *vsp1,
99 	dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on UIF sink\n",
115 static int vsp1_du_pipeline_setup_rpf(struct vsp1_device *vsp1,
134 	crop = &vsp1->drm->inputs[rpf->entity.index].crop;
147 	dev_dbg(vsp1->dev,
161 	dev_dbg(vsp1->dev,
177 	dev_dbg(vsp1->dev,
190 	ret = vsp1_du_insert_uif(vsp1, pipe, uif, &rpf->entity, RWPF_PAD_SOURCE,
203 	dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on %s pad %u\n",
209 	sel.r = vsp1->drm->inputs[rpf->entity.index].compose;
216 	dev_dbg(vsp1->dev, "%s: set selection (%u,%u)/%ux%u on %s pad %u\n",
224 static int vsp1_du_pipeline_setup_inputs(struct vsp1_device *vsp1,
228 static int vsp1_du_pipeline_setup_brx(struct vsp1_device *vsp1,
245 		brx = &vsp1->bru->entity;
248 	else if (vsp1_feature(vsp1, VSP1_HAS_BRU) && !vsp1->bru->entity.pipe)
249 		brx = &vsp1->bru->entity;
251 		brx = &vsp1->brs->entity;
259 			dev_dbg(vsp1->dev, "%s: pipe %u: releasing %s\n",
292 			dev_dbg(vsp1->dev, "%s: pipe %u: waiting for %s\n",
298 			vsp1_du_pipeline_setup_inputs(vsp1, &owner_pipe->pipe);
305 				dev_warn(vsp1->dev,
321 		dev_dbg(vsp1->dev, "%s: pipe %u: acquired %s\n",
348 	dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on %s pad %u\n",
354 		dev_dbg(vsp1->dev, "%s: format mismatch\n", __func__);
361 static unsigned int rpf_zpos(struct vsp1_device *vsp1, struct vsp1_rwpf *rpf)
363 	return vsp1->drm->inputs[rpf->entity.index].zpos;
367 static int vsp1_du_pipeline_setup_inputs(struct vsp1_device *vsp1,
381 	for (i = 0; i < vsp1->info->rpf_count; ++i) {
382 		struct vsp1_rwpf *rpf = vsp1->rpf[i];
390 			if (rpf_zpos(vsp1, inputs[j-1]) <= rpf_zpos(vsp1, rpf))
403 	ret = vsp1_du_pipeline_setup_brx(vsp1, pipe);
405 		dev_err(vsp1->dev, "%s: failed to setup %s source\n", __func__,
431 		dev_dbg(vsp1->dev, "%s: connecting RPF.%u to %s:%u\n",
438 		ret = vsp1_du_pipeline_setup_rpf(vsp1, pipe, rpf, uif, i);
440 			dev_err(vsp1->dev,
451 	ret = vsp1_du_insert_uif(vsp1, pipe, uif,
455 		dev_err(vsp1->dev, "%s: failed to setup UIF after %s\n",
480 static int vsp1_du_pipeline_setup_output(struct vsp1_device *vsp1,
500 	dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on WPF%u sink\n",
510 	dev_dbg(vsp1->dev, "%s: got format %ux%u (%x) on WPF%u source\n",
520 	dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on LIF%u sink\n",
531 		dev_dbg(vsp1->dev, "%s: format mismatch on LIF%u\n", __func__,
578 static int vsp1_du_pipeline_set_rwpf_format(struct vsp1_device *vsp1,
585 	fmtinfo = vsp1_get_format_info(vsp1, pixelformat);
587 		dev_dbg(vsp1->dev, "Unsupported pixel format %08x\n",
614 	struct vsp1_device *vsp1 = dev_get_drvdata(dev);
616 	if (!vsp1)
647 	struct vsp1_device *vsp1 = dev_get_drvdata(dev);
654 	if (pipe_index >= vsp1->info->lif_count)
657 	drm_pipe = &vsp1->drm->pipe[pipe_index];
663 		mutex_lock(&vsp1->drm->lock);
673 			dev_err(vsp1->dev, "DRM pipeline stop timeout\n");
696 		dev_dbg(vsp1->dev, "%s: pipe %u: releasing %s\n",
704 		mutex_unlock(&vsp1->drm->lock);
707 		vsp1_device_put(vsp1);
709 		dev_dbg(vsp1->dev, "%s: pipeline disabled\n", __func__);
721 	dev_dbg(vsp1->dev, "%s: configuring LIF%u with format %ux%u%s\n",
725 	mutex_lock(&vsp1->drm->lock);
728 	ret = vsp1_du_pipeline_setup_inputs(vsp1, pipe);
732 	ret = vsp1_du_pipeline_setup_output(vsp1, pipe);
737 	ret = vsp1_device_get(vsp1);
749 	vsp1_write(vsp1, VI6_DISP_IRQ_STA(pipe_index), 0);
750 	vsp1_write(vsp1, VI6_DISP_IRQ_ENB(pipe_index), 0);
756 	mutex_unlock(&vsp1->drm->lock);
766 	dev_dbg(vsp1->dev, "%s: pipeline enabled\n", __func__);
816 	struct vsp1_device *vsp1 = dev_get_drvdata(dev);
817 	struct vsp1_drm_pipeline *drm_pipe = &vsp1->drm->pipe[pipe_index];
821 	if (rpf_index >= vsp1->info->rpf_count)
824 	rpf = vsp1->rpf[rpf_index];
827 		dev_dbg(vsp1->dev, "%s: RPF%u: disable requested\n", __func__,
840 	dev_dbg(vsp1->dev,
852 	ret = vsp1_du_pipeline_set_rwpf_format(vsp1, rpf, cfg->pixelformat,
865 	vsp1->drm->inputs[rpf_index].crop = cfg->src;
866 	vsp1->drm->inputs[rpf_index].compose = cfg->dst;
867 	vsp1->drm->inputs[rpf_index].zpos = cfg->zpos;
884 	struct vsp1_device *vsp1 = dev_get_drvdata(dev);
885 	struct vsp1_drm_pipeline *drm_pipe = &vsp1->drm->pipe[pipe_index];
891 	mutex_lock(&vsp1->drm->lock);
896 		ret = vsp1_du_pipeline_set_rwpf_format(vsp1, pipe->output,
908 	vsp1_du_pipeline_setup_inputs(vsp1, pipe);
912 	mutex_unlock(&vsp1->drm->lock);
918 	struct vsp1_device *vsp1 = dev_get_drvdata(dev);
925 	return dma_map_sgtable(vsp1->bus_master, sgt, DMA_TO_DEVICE,
932 	struct vsp1_device *vsp1 = dev_get_drvdata(dev);
934 	dma_unmap_sgtable(vsp1->bus_master, sgt, DMA_TO_DEVICE,
943 int vsp1_drm_init(struct vsp1_device *vsp1)
947 	vsp1->drm = devm_kzalloc(vsp1->dev, sizeof(*vsp1->drm), GFP_KERNEL);
948 	if (!vsp1->drm)
951 	mutex_init(&vsp1->drm->lock);
954 	for (i = 0; i < vsp1->info->lif_count; ++i) {
955 		struct vsp1_drm_pipeline *drm_pipe = &vsp1->drm->pipe[i];
968 		pipe->output = vsp1->wpf[i];
969 		pipe->lif = &vsp1->lif[i]->entity;
983 		if (i < vsp1->info->uif_count)
984 			drm_pipe->uif = &vsp1->uif[i]->entity;
988 	for (i = 0; i < vsp1->info->rpf_count; ++i) {
989 		struct vsp1_rwpf *input = vsp1->rpf[i];
997 void vsp1_drm_cleanup(struct vsp1_device *vsp1)
999 	mutex_destroy(&vsp1->drm->lock);