renesas/vsp1/vsp1_drm.c

36 	struct vsp1_drm_pipeline *drm_pipe = to_vsp1_drm_pipeline(pipe);
38 	if (drm_pipe->du_complete) {
39 		struct vsp1_entity *uif = drm_pipe->uif;
46 		drm_pipe->du_complete(drm_pipe->du_private, status, crc);
50 		drm_pipe->force_brx_release = false;
51 		wake_up(&drm_pipe->wait_queue);
231 	struct vsp1_drm_pipeline *drm_pipe = to_vsp1_drm_pipeline(pipe);
246 	else if (pipe->brx && !drm_pipe->force_brx_release)
339 	format.format.width = drm_pipe->width;
340 	format.format.height = drm_pipe->height;
352 	if (format.format.width != drm_pipe->width ||
353 	    format.format.height != drm_pipe->height) {
370 	struct vsp1_drm_pipeline *drm_pipe = to_vsp1_drm_pipeline(pipe);
434 		uif = drm_pipe->crc.source == VSP1_DU_CRC_PLANE &&
435 		      drm_pipe->crc.index == i ? drm_pipe->uif : NULL;
448 	uif = drm_pipe->crc.source == VSP1_DU_CRC_OUTPUT ? drm_pipe->uif : NULL;
459 	if (!drm_pipe->uif)
470 		drm_pipe->uif->pipe = NULL;
471 	} else if (!drm_pipe->uif->pipe) {
472 		drm_pipe->uif->pipe = pipe;
473 		list_add_tail(&drm_pipe->uif->list_pipe, &pipe->entities);
483 	struct vsp1_drm_pipeline *drm_pipe = to_vsp1_drm_pipeline(pipe);
490 	format.format.width = drm_pipe->width;
491 	format.format.height = drm_pipe->height;
528 	if (format.format.width != drm_pipe->width ||
529 	    format.format.height != drm_pipe->height ||
542 	struct vsp1_drm_pipeline *drm_pipe = to_vsp1_drm_pipeline(pipe);
549 	if (drm_pipe->force_brx_release)
648 	struct vsp1_drm_pipeline *drm_pipe;
657 	drm_pipe = &vsp1->drm->pipe[pipe_index];
658 	pipe = &drm_pipe->pipe;
693 		drm_pipe->du_complete = NULL;
717 	drm_pipe->width = cfg->width;
718 	drm_pipe->height = cfg->height;
745 	drm_pipe->du_complete = cfg->callback;
746 	drm_pipe->du_private = cfg->callback_data;
817 	struct vsp1_drm_pipeline *drm_pipe = &vsp1->drm->pipe[pipe_index];
836 		drm_pipe->pipe.inputs[rpf_index] = NULL;
869 	drm_pipe->pipe.inputs[rpf_index] = rpf;
885 	struct vsp1_drm_pipeline *drm_pipe = &vsp1->drm->pipe[pipe_index];
886 	struct vsp1_pipeline *pipe = &drm_pipe->pipe;
889 	drm_pipe->crc = cfg->crc;
955 		struct vsp1_drm_pipeline *drm_pipe = &vsp1->drm->pipe[i];
956 		struct vsp1_pipeline *pipe = &drm_pipe->pipe;
958 		init_waitqueue_head(&drm_pipe->wait_queue);
984 			drm_pipe->uif = &vsp1->uif[i]->entity;