renesas/vsp1/vsp1_dl.c

171  * @dlm: the display list manager
185 	struct vsp1_dl_manager *dlm;
534 	struct vsp1_dl_manager *dlm = dl->dlm;
539 	dl->pre_cmd = vsp1_dl_ext_cmd_get(dlm->cmdpool);
548 static struct vsp1_dl_list *vsp1_dl_list_alloc(struct vsp1_dl_manager *dlm)
558 	dl->dlm = dlm;
561 	dl->body0 = vsp1_dl_body_get(dlm->pool);
598  * @dlm: The display list manager
604 struct vsp1_dl_list *vsp1_dl_list_get(struct vsp1_dl_manager *dlm)
609 	spin_lock_irqsave(&dlm->lock, flags);
611 	if (!list_empty(&dlm->free)) {
612 		dl = list_first_entry(&dlm->free, struct vsp1_dl_list, list);
622 	spin_unlock_irqrestore(&dlm->lock, flags);
660 	list_add_tail(&dl->list, &dl->dlm->free);
679 	spin_lock_irqsave(&dl->dlm->lock, flags);
681 	spin_unlock_irqrestore(&dl->dlm->lock, flags);
753 	struct vsp1_dl_manager *dlm = dl->dlm;
786 	if (!dlm->singleshot || is_last)
795 	if (!dlm->singleshot || !is_last)
806 	} else if (!dlm->singleshot) {
837 static bool vsp1_dl_list_hw_update_pending(struct vsp1_dl_manager *dlm)
839 	struct vsp1_device *vsp1 = dlm->vsp1;
841 	if (!dlm->queued)
848 	return !!(vsp1_read(vsp1, VI6_CMD(dlm->index)) & VI6_CMD_UPDHDR);
853 	struct vsp1_dl_manager *dlm = dl->dlm;
854 	struct vsp1_device *vsp1 = dlm->vsp1;
863 	vsp1_write(vsp1, VI6_DL_HDR_ADDR(dlm->index), dl->dma);
868 	struct vsp1_dl_manager *dlm = dl->dlm;
885 	if (vsp1_dl_list_hw_update_pending(dlm)) {
886 		WARN_ON(dlm->pending &&
887 			(dlm->pending->flags & VSP1_DL_FRAME_END_INTERNAL));
888 		__vsp1_dl_list_put(dlm->pending);
889 		dlm->pending = dl;
899 	__vsp1_dl_list_put(dlm->queued);
900 	dlm->queued = dl;
905 	struct vsp1_dl_manager *dlm = dl->dlm;
914 	dlm->active = dl;
919 	struct vsp1_dl_manager *dlm = dl->dlm;
934 	spin_lock_irqsave(&dlm->lock, flags);
936 	if (dlm->singleshot)
941 	spin_unlock_irqrestore(&dlm->lock, flags);
950  * @dlm: the display list manager
969 unsigned int vsp1_dlm_irq_frame_end(struct vsp1_dl_manager *dlm)
971 	struct vsp1_device *vsp1 = dlm->vsp1;
975 	spin_lock(&dlm->lock);
981 	if (dlm->singleshot) {
982 		__vsp1_dl_list_put(dlm->active);
983 		dlm->active = NULL;
994 	if (vsp1_dl_list_hw_update_pending(dlm))
1002 	if (status & VI6_STATUS_FLD_STD(dlm->index))
1011 	if (dlm->active && (dlm->active->flags & VSP1_DL_FRAME_END_WRITEBACK)) {
1013 		dlm->active->flags &= ~VSP1_DL_FRAME_END_WRITEBACK;
1020 	if (dlm->queued) {
1021 		if (dlm->queued->flags & VSP1_DL_FRAME_END_INTERNAL)
1023 		dlm->queued->flags &= ~VSP1_DL_FRAME_END_INTERNAL;
1025 		__vsp1_dl_list_put(dlm->active);
1026 		dlm->active = dlm->queued;
1027 		dlm->queued = NULL;
1036 	if (dlm->pending) {
1037 		vsp1_dl_list_hw_enqueue(dlm->pending);
1038 		dlm->queued = dlm->pending;
1039 		dlm->pending = NULL;
1043 	spin_unlock(&dlm->lock);
1067 void vsp1_dlm_reset(struct vsp1_dl_manager *dlm)
1071 	spin_lock_irqsave(&dlm->lock, flags);
1073 	__vsp1_dl_list_put(dlm->active);
1074 	__vsp1_dl_list_put(dlm->queued);
1075 	__vsp1_dl_list_put(dlm->pending);
1077 	spin_unlock_irqrestore(&dlm->lock, flags);
1079 	dlm->active = NULL;
1080 	dlm->queued = NULL;
1081 	dlm->pending = NULL;
1084 struct vsp1_dl_body *vsp1_dlm_dl_body_get(struct vsp1_dl_manager *dlm)
1086 	return vsp1_dl_body_get(dlm->pool);
1093 	struct vsp1_dl_manager *dlm;
1097 	dlm = devm_kzalloc(vsp1->dev, sizeof(*dlm), GFP_KERNEL);
1098 	if (!dlm)
1101 	dlm->index = index;
1102 	dlm->singleshot = vsp1->info->uapi;
1103 	dlm->vsp1 = vsp1;
1105 	spin_lock_init(&dlm->lock);
1106 	INIT_LIST_HEAD(&dlm->free);
1121 	dlm->pool = vsp1_dl_body_pool_create(vsp1, prealloc + 1,
1123 	if (!dlm->pool)
1129 		dl = vsp1_dl_list_alloc(dlm);
1131 			vsp1_dlm_destroy(dlm);
1140 		list_add_tail(&dl->list, &dlm->free);
1144 		dlm->cmdpool = vsp1_dl_cmd_pool_create(vsp1,
1146 		if (!dlm->cmdpool) {
1147 			vsp1_dlm_destroy(dlm);
1152 	return dlm;
1155 void vsp1_dlm_destroy(struct vsp1_dl_manager *dlm)
1159 	if (!dlm)
1162 	list_for_each_entry_safe(dl, next, &dlm->free, list) {
1167 	vsp1_dl_body_pool_destroy(dlm->pool);
1168 	vsp1_dl_ext_cmd_pool_destroy(dlm->cmdpool);