mediatek/mdp3/mtk-mdp3-comp.c

116 		reg = CFG_COMP(MT8183, ctx->param, rdma.src_ctrl);
118 		reg = CFG_COMP(MT8195, ctx->param, rdma.src_ctrl);
126 				reg = CFG_COMP(MT8183, ctx->param, rdma.ufo_dec_y);
128 				reg = CFG_COMP(MT8195, ctx->param, rdma.ufo_dec_y);
134 				reg = CFG_COMP(MT8183, ctx->param, rdma.ufo_dec_c);
136 				reg = CFG_COMP(MT8195, ctx->param, rdma.ufo_dec_c);
144 					reg = CFG_COMP(MT8183, ctx->param, rdma.mf_bkgd_in_pxl);
146 					reg = CFG_COMP(MT8195, ctx->param, rdma.mf_bkgd_in_pxl);
154 		reg = CFG_COMP(MT8183, ctx->param, rdma.control);
157 		reg = CFG_COMP(MT8195, ctx->param, rdma.control);
165 		reg = CFG_COMP(MT8183, ctx->param, rdma.iova[0]);
167 		reg = CFG_COMP(MT8195, ctx->param, rdma.iova[0]);
172 		reg = CFG_COMP(MT8183, ctx->param, rdma.iova[1]);
174 		reg = CFG_COMP(MT8195, ctx->param, rdma.iova[1]);
179 		reg = CFG_COMP(MT8183, ctx->param, rdma.iova[2]);
181 		reg = CFG_COMP(MT8195, ctx->param, rdma.iova[2]);
187 		reg = CFG_COMP(MT8183, ctx->param, rdma.iova_end[0]);
189 		reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[0]);
194 		reg = CFG_COMP(MT8183, ctx->param, rdma.iova_end[1]);
196 		reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[1]);
201 		reg = CFG_COMP(MT8183, ctx->param, rdma.iova_end[2]);
203 		reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[2]);
209 		reg = CFG_COMP(MT8183, ctx->param, rdma.mf_bkgd);
211 		reg = CFG_COMP(MT8195, ctx->param, rdma.mf_bkgd);
216 		reg = CFG_COMP(MT8183, ctx->param, rdma.sf_bkgd);
218 		reg = CFG_COMP(MT8195, ctx->param, rdma.sf_bkgd);
224 		reg = CFG_COMP(MT8183, ctx->param, rdma.transform);
226 		reg = CFG_COMP(MT8195, ctx->param, rdma.transform);
234 		reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con0);
239 		reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_high_con0);
244 		reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_low_con0);
249 		reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con1);
254 		reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_high_con1);
259 		reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_low_con1);
264 		reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con2);
269 		reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_high_con2);
274 		reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_low_con2);
279 		reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con3);
304 		reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].offset[0]);
306 		reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset[0]);
314 				reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].offset_0_p);
316 				reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset_0_p);
325 		reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].offset[1]);
327 		reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset[1]);
333 		reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].offset[2]);
335 		reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset[2]);
341 		reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].src);
343 		reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].src);
349 		reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].clip);
351 		reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].clip);
357 		reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].clip_ofst);
359 		reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].clip_ofst);
1544 		.compatible = "mediatek,mt8183-mdp3-rdma",
1559 		.compatible = "mediatek,mt8195-mdp3-rdma",