chips-media/wave5/wave5-vpu.c

31 	int ret;
33 	ret = wait_for_completion_timeout(&inst->irq_done,
35 	if (!ret)
91 	int ret;
94 	ret = request_firmware(&fw, fw_name, dev);
95 	if (ret) {
96 		dev_err(dev, "request_firmware, fail: %d\n", ret);
97 		return ret;
100 	ret = wave5_vpu_init_with_bitcode(dev, (u8 *)fw->data, fw->size);
101 	if (ret) {
102 		dev_err(dev, "vpu_init_with_bitcode, fail: %d\n", ret);
104 		return ret;
108 	ret = wave5_vpu_get_version_info(dev, revision, &product_id);
109 	if (ret) {
110 		dev_err(dev, "vpu_get_version_info fail: %d\n", ret);
111 		return ret;
122 	int ret;
134 	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
135 	if (ret) {
136 		dev_err(&pdev->dev, "Failed to set DMA mask: %d\n", ret);
137 		return ret;
154 	ret = devm_clk_bulk_get_all(&pdev->dev, &dev->clks);
157 	if (ret < 0) {
158 		dev_warn(&pdev->dev, "Getting clocks, fail: %d\n", ret);
159 		ret = 0;
161 	dev->num_clks = ret;
163 	ret = clk_bulk_prepare_enable(dev->num_clks, dev->clks);
164 	if (ret) {
165 		dev_err(&pdev->dev, "Enabling clocks, fail: %d\n", ret);
166 		return ret;
169 	ret = of_property_read_u32(pdev->dev.of_node, "sram-size",
171 	if (ret) {
181 	ret = wave5_vdi_init(&pdev->dev);
182 	if (ret < 0) {
183 		dev_err(&pdev->dev, "wave5_vdi_init, fail: %d\n", ret);
189 	ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
190 	if (ret) {
191 		dev_err(&pdev->dev, "v4l2_device_register, fail: %d\n", ret);
196 		ret = wave5_vpu_dec_register_device(dev);
197 		if (ret) {
198 			dev_err(&pdev->dev, "wave5_vpu_dec_register_device, fail: %d\n", ret);
203 		ret = wave5_vpu_enc_register_device(dev);
204 		if (ret) {
205 			dev_err(&pdev->dev, "wave5_vpu_enc_register_device, fail: %d\n", ret);
213 		ret = -ENXIO;
217 	ret = devm_request_threaded_irq(&pdev->dev, dev->irq, NULL,
219 	if (ret) {
220 		dev_err(&pdev->dev, "Register interrupt handler, fail: %d\n", ret);
224 	ret = wave5_vpu_load_firmware(&pdev->dev, match_data->fw_name, &fw_revision);
225 	if (ret) {
226 		dev_err(&pdev->dev, "wave5_vpu_load_firmware, fail: %d\n", ret);
250 	return ret;