Lines Matching refs:param

63 static inline u32 settings_get_mcu_codec(struct create_channel_param *param)
65 enum mcu_msg_version version = param->version;
66 u32 pixelformat = param->codec;
88 allegro_encode_config_blob(u32 *dst, struct create_channel_param *param)
90 enum mcu_msg_version version = param->version;
94 unsigned int codec = settings_get_mcu_codec(param);
97 dst[i++] = param->layer_id;
98 dst[i++] = FIELD_PREP(GENMASK(31, 16), param->height) |
99 FIELD_PREP(GENMASK(15, 0), param->width);
101 dst[i++] = param->videomode;
102 dst[i++] = param->format;
104 dst[i++] = param->colorspace;
105 dst[i++] = param->src_mode;
107 dst[i++] = param->src_bit_depth;
109 FIELD_PREP(GENMASK(23, 8), param->constraint_set_flags) |
110 FIELD_PREP(GENMASK(7, 0), param->profile);
111 dst[i++] = FIELD_PREP(GENMASK(31, 16), param->tier) |
112 FIELD_PREP(GENMASK(15, 0), param->level);
115 val |= param->temporal_mvp_enable ? BIT(20) : 0;
116 val |= FIELD_PREP(GENMASK(7, 4), param->log2_max_frame_num);
118 val |= FIELD_PREP(GENMASK(3, 0), param->log2_max_poc - 1);
120 val |= FIELD_PREP(GENMASK(3, 0), param->log2_max_poc);
124 val |= param->enable_reordering ? BIT(0) : 0;
125 val |= param->dbf_ovr_en ? BIT(2) : 0;
126 val |= param->override_lf ? BIT(12) : 0;
131 val |= param->custom_lda ? BIT(2) : 0;
132 val |= param->rdo_cost_mode ? BIT(20) : 0;
136 val |= param->lf ? BIT(2) : 0;
137 val |= param->lf_x_tile ? BIT(3) : 0;
138 val |= param->lf_x_slice ? BIT(4) : 0;
145 dst[i++] = FIELD_PREP(GENMASK(15, 8), param->beta_offset) |
146 FIELD_PREP(GENMASK(7, 0), param->tc_offset);
147 dst[i++] = param->unknown11;
148 dst[i++] = param->unknown12;
149 dst[i++] = param->num_slices;
150 dst[i++] = param->encoder_buffer_offset;
151 dst[i++] = param->encoder_buffer_enabled;
153 dst[i++] = FIELD_PREP(GENMASK(31, 16), param->clip_vrt_range) |
154 FIELD_PREP(GENMASK(15, 0), param->clip_hrz_range);
155 dst[i++] = FIELD_PREP(GENMASK(31, 16), param->me_range[1]) |
156 FIELD_PREP(GENMASK(15, 0), param->me_range[0]);
157 dst[i++] = FIELD_PREP(GENMASK(31, 16), param->me_range[3]) |
158 FIELD_PREP(GENMASK(15, 0), param->me_range[2]);
159 dst[i++] = FIELD_PREP(GENMASK(31, 24), param->min_tu_size) |
160 FIELD_PREP(GENMASK(23, 16), param->max_tu_size) |
161 FIELD_PREP(GENMASK(15, 8), param->min_cu_size) |
162 FIELD_PREP(GENMASK(8, 0), param->max_cu_size);
163 dst[i++] = FIELD_PREP(GENMASK(15, 8), param->max_transfo_depth_intra) |
164 FIELD_PREP(GENMASK(7, 0), param->max_transfo_depth_inter);
165 dst[i++] = param->entropy_mode;
166 dst[i++] = param->wp_mode;
168 dst[i++] = param->rate_control_mode;
169 dst[i++] = param->initial_rem_delay;
170 dst[i++] = param->cpb_size;
171 dst[i++] = FIELD_PREP(GENMASK(31, 16), param->clk_ratio) |
172 FIELD_PREP(GENMASK(15, 0), param->framerate);
173 dst[i++] = param->target_bitrate;
174 dst[i++] = param->max_bitrate;
175 dst[i++] = FIELD_PREP(GENMASK(31, 16), param->min_qp) |
176 FIELD_PREP(GENMASK(15, 0), param->initial_qp);
177 dst[i++] = FIELD_PREP(GENMASK(31, 16), param->ip_delta) |
178 FIELD_PREP(GENMASK(15, 0), param->max_qp);
179 dst[i++] = FIELD_PREP(GENMASK(31, 16), param->golden_ref) |
180 FIELD_PREP(GENMASK(15, 0), param->pb_delta);
181 dst[i++] = FIELD_PREP(GENMASK(31, 16), param->golden_ref_frequency) |
182 FIELD_PREP(GENMASK(15, 0), param->golden_delta);
184 dst[i++] = param->rate_control_option;
189 dst[i++] = param->num_pixel;
190 dst[i++] = FIELD_PREP(GENMASK(31, 16), param->max_pixel_value) |
191 FIELD_PREP(GENMASK(15, 0), param->max_psnr);
193 dst[i++] = param->maxpicturesize[j];
197 dst[i++] = param->gop_ctrl_mode;
202 dst[i++] = FIELD_PREP(GENMASK(31, 24), param->freq_golden_ref) |
203 FIELD_PREP(GENMASK(23, 16), param->num_b) |
204 FIELD_PREP(GENMASK(15, 0), param->gop_length);
205 dst[i++] = param->freq_idr;
207 dst[i++] = param->enable_lt;
208 dst[i++] = param->freq_lt;
209 dst[i++] = param->gdr_mode;
211 dst[i++] = FIELD_PREP(GENMASK(31, 24), param->freq_golden_ref) |
212 FIELD_PREP(GENMASK(23, 16), param->num_b) |
213 FIELD_PREP(GENMASK(15, 0), param->gop_length);
216 dst[i++] = param->tmpdqp;
218 dst[i++] = param->subframe_latency;
219 dst[i++] = param->lda_control_mode;
221 dst[i++] = param->unknown41;
225 dst[i++] = param->lda_factors[j];
226 dst[i++] = param->max_num_merge_cand;
253 ssize_t allegro_decode_config_blob(struct create_channel_param *param,
260 param->num_ref_idx_l0 = FIELD_GET(GENMASK(7, 4), src[9]);
261 param->num_ref_idx_l1 = FIELD_GET(GENMASK(11, 8), src[9]);
263 param->num_ref_idx_l0 = msg->num_ref_idx_l0;
264 param->num_ref_idx_l1 = msg->num_ref_idx_l1;