Lines Matching refs:twi_ctrl0_stat
22 /* twi_ctrl0_stat reg bits */
56 __le16 twi_ctrl0_stat;
72 reg = readw(&i2c->regs->twi_ctrl0_stat);
73 writew(reg & ~TWI_IRQEN, &i2c->regs->twi_ctrl0_stat);
180 u16 reg = readw(&i2c->regs->twi_ctrl0_stat);
182 writew(TWI_IRQEN | reg, &i2c->regs->twi_ctrl0_stat);
187 "%s(): length %d twi_addr_ctrl1 0x%x twi_ctrl0_stat 0x%x\n",
190 readw(&i2c->regs->twi_ctrl0_stat));
258 &i2c->regs->twi_ctrl0_stat);
260 &i2c->regs->twi_ctrl0_stat);