pci/netup_unidvb/netup_unidvb_i2c.c

65 irqreturn_t netup_i2c_interrupt(struct netup_i2c *i2c)
71 	spin_lock_irqsave(&i2c->lock, flags);
72 	reg = readw(&i2c->regs->twi_ctrl0_stat);
73 	writew(reg & ~TWI_IRQEN, &i2c->regs->twi_ctrl0_stat);
74 	dev_dbg(i2c->adap.dev.parent,
77 		dev_dbg(i2c->adap.dev.parent,
79 		i2c->state = STATE_DONE;
83 		dev_dbg(i2c->adap.dev.parent,
85 		i2c->state = STATE_ERROR;
89 		dev_dbg(i2c->adap.dev.parent,
91 		i2c->state = STATE_ERROR;
95 		tmp = readw(&i2c->regs->rx_fifo.stat_ctrl);
96 		writew(tmp & ~FIFO_IRQEN, &i2c->regs->rx_fifo.stat_ctrl);
97 		i2c->state = STATE_WANT_READ;
98 		dev_dbg(i2c->adap.dev.parent,
103 		tmp = readw(&i2c->regs->tx_fifo.stat_ctrl);
104 		writew(tmp & ~FIFO_IRQEN, &i2c->regs->tx_fifo.stat_ctrl);
105 		i2c->state = STATE_WANT_WRITE;
106 		dev_dbg(i2c->adap.dev.parent,
110 	dev_warn(&i2c->adap.dev, "%s(): not mine interrupt\n", __func__);
113 	spin_unlock_irqrestore(&i2c->lock, flags);
115 		wake_up(&i2c->wq);
119 static void netup_i2c_reset(struct netup_i2c *i2c)
121 	dev_dbg(i2c->adap.dev.parent, "%s()\n", __func__);
122 	i2c->state = STATE_DONE;
123 	writew(TWI_SOFT_RESET, &i2c->regs->twi_addr_ctrl1);
124 	writew(TWI_CLKDIV, &i2c->regs->clkdiv);
125 	writew(FIFO_RESET, &i2c->regs->tx_fifo.stat_ctrl);
126 	writew(FIFO_RESET, &i2c->regs->rx_fifo.stat_ctrl);
127 	writew(0x800, &i2c->regs->tx_fifo.stat_ctrl);
128 	writew(0x800, &i2c->regs->rx_fifo.stat_ctrl);
131 static void netup_i2c_fifo_tx(struct netup_i2c *i2c)
135 		(readw(&i2c->regs->tx_fifo.stat_ctrl) & 0x3f);
136 	u32 msg_length = i2c->msg->len - i2c->xmit_size;
140 		data = i2c->msg->buf[i2c->xmit_size++];
141 		writeb(data, &i2c->regs->tx_fifo.data8);
142 		dev_dbg(i2c->adap.dev.parent,
145 	if (i2c->xmit_size < i2c->msg->len) {
146 		dev_dbg(i2c->adap.dev.parent,
148 		writew(readw(&i2c->regs->tx_fifo.stat_ctrl) | FIFO_IRQEN,
149 			&i2c->regs->tx_fifo.stat_ctrl);
153 static void netup_i2c_fifo_rx(struct netup_i2c *i2c)
156 	u32 fifo_size = readw(&i2c->regs->rx_fifo.stat_ctrl) & 0x3f;
158 	dev_dbg(i2c->adap.dev.parent,
161 		data = readb(&i2c->regs->rx_fifo.data8);
162 		if ((i2c->msg->flags & I2C_M_RD) != 0 &&
163 					i2c->xmit_size < i2c->msg->len) {
164 			i2c->msg->buf[i2c->xmit_size++] = data;
165 			dev_dbg(i2c->adap.dev.parent,
169 	if (i2c->xmit_size < i2c->msg->len) {
170 		dev_dbg(i2c->adap.dev.parent,
172 		writew(readw(&i2c->regs->rx_fifo.stat_ctrl) | FIFO_IRQEN,
173 			&i2c->regs->rx_fifo.stat_ctrl);
177 static void netup_i2c_start_xfer(struct netup_i2c *i2c)
179 	u16 rdflag = ((i2c->msg->flags & I2C_M_RD) ? 1 : 0);
180 	u16 reg = readw(&i2c->regs->twi_ctrl0_stat);
182 	writew(TWI_IRQEN | reg, &i2c->regs->twi_ctrl0_stat);
183 	writew(i2c->msg->len, &i2c->regs->length);
184 	writew(TWI_TRANSFER | (i2c->msg->addr << 1) | rdflag,
185 		&i2c->regs->twi_addr_ctrl1);
186 	dev_dbg(i2c->adap.dev.parent,
188 		__func__, readw(&i2c->regs->length),
189 		readw(&i2c->regs->twi_addr_ctrl1),
190 		readw(&i2c->regs->twi_ctrl0_stat));
191 	i2c->state = STATE_WAIT;
192 	i2c->xmit_size = 0;
194 		netup_i2c_fifo_tx(i2c);
196 		writew(FIFO_IRQEN | readw(&i2c->regs->rx_fifo.stat_ctrl),
197 			&i2c->regs->rx_fifo.stat_ctrl);
205 	struct netup_i2c *i2c = i2c_get_adapdata(adap);
208 	spin_lock_irqsave(&i2c->lock, flags);
209 	if (i2c->state != STATE_DONE) {
210 		dev_dbg(i2c->adap.dev.parent,
211 			"%s(): i2c->state == %d, resetting I2C\n",
212 			__func__, i2c->state);
213 		netup_i2c_reset(i2c);
215 	dev_dbg(i2c->adap.dev.parent, "%s() num %d\n", __func__, num);
217 		i2c->msg = &msgs[i];
218 		netup_i2c_start_xfer(i2c);
221 			spin_unlock_irqrestore(&i2c->lock, flags);
222 			if (wait_event_timeout(i2c->wq,
223 					i2c->state != STATE_WAIT,
225 				spin_lock_irqsave(&i2c->lock, flags);
226 				switch (i2c->state) {
228 					netup_i2c_fifo_rx(i2c);
231 					netup_i2c_fifo_tx(i2c);
234 					if ((i2c->msg->flags & I2C_M_RD) != 0 &&
235 						i2c->xmit_size != i2c->msg->len)
236 						netup_i2c_fifo_rx(i2c);
237 					dev_dbg(i2c->adap.dev.parent,
244 					dev_dbg(i2c->adap.dev.parent,
249 					dev_dbg(i2c->adap.dev.parent,
251 						__func__, i2c->state);
256 					i2c->state = STATE_WAIT;
258 						&i2c->regs->twi_ctrl0_stat);
260 						&i2c->regs->twi_ctrl0_stat);
262 				spin_unlock_irqrestore(&i2c->lock, flags);
264 				spin_lock_irqsave(&i2c->lock, flags);
265 				dev_dbg(i2c->adap.dev.parent,
270 			spin_lock_irqsave(&i2c->lock, flags);
274 	spin_unlock_irqrestore(&i2c->lock, flags);
275 	dev_dbg(i2c->adap.dev.parent, "%s(): result %d\n", __func__, res);
299 	struct netup_i2c *i2c;
306 	i2c = &ndev->i2c[bus_num];
307 	spin_lock_init(&i2c->lock);
308 	init_waitqueue_head(&i2c->wq);
309 	i2c->regs = (struct netup_i2c_regs __iomem *)(ndev->bmmio0 +
311 	netup_i2c_reset(i2c);
312 	i2c->adap = netup_i2c_adapter;
313 	i2c->adap.dev.parent = &ndev->pci_dev->dev;
314 	i2c_set_adapdata(&i2c->adap, i2c);
315 	ret = i2c_add_adapter(&i2c->adap);
329 	struct netup_i2c *i2c;
336 	i2c = &ndev->i2c[bus_num];
337 	netup_i2c_reset(i2c);
339 	i2c_del_adapter(&i2c->adap);