Lines Matching refs:bridge
3 * Driver for ST MIPID02 CSI-2 to PARALLEL bridge
229 static int mipid02_get_regulators(struct mipid02_dev *bridge)
234 bridge->supplies[i].supply = mipid02_supply_name[i];
236 return devm_regulator_bulk_get(&bridge->i2c_client->dev,
238 bridge->supplies);
241 static void mipid02_apply_reset(struct mipid02_dev *bridge)
243 gpiod_set_value_cansleep(bridge->reset_gpio, 0);
245 gpiod_set_value_cansleep(bridge->reset_gpio, 1);
247 gpiod_set_value_cansleep(bridge->reset_gpio, 0);
251 static int mipid02_set_power_on(struct mipid02_dev *bridge)
253 struct i2c_client *client = bridge->i2c_client;
256 ret = clk_prepare_enable(bridge->xclk);
263 bridge->supplies);
270 if (bridge->reset_gpio) {
272 mipid02_apply_reset(bridge);
281 clk_disable_unprepare(bridge->xclk);
285 static void mipid02_set_power_off(struct mipid02_dev *bridge)
287 regulator_bulk_disable(MIPID02_NUM_SUPPLIES, bridge->supplies);
288 clk_disable_unprepare(bridge->xclk);
291 static int mipid02_detect(struct mipid02_dev *bridge)
299 return cci_read(bridge->regmap, MIPID02_CLK_LANE_WR_REG1, ®, NULL);
307 static int mipid02_configure_from_rx_speed(struct mipid02_dev *bridge,
310 struct i2c_client *client = bridge->i2c_client;
311 struct v4l2_subdev *subdev = bridge->s_subdev;
312 struct v4l2_fwnode_endpoint *ep = &bridge->rx;
330 bridge->r.clk_lane_reg1 |= ui_4 << 2;
335 static int mipid02_configure_clk_lane(struct mipid02_dev *bridge)
337 struct i2c_client *client = bridge->i2c_client;
338 struct v4l2_fwnode_endpoint *ep = &bridge->rx;
346 bridge->r.clk_lane_reg1 |= (polarities[0] << 1) | CLK_ENABLE;
351 static int mipid02_configure_data0_lane(struct mipid02_dev *bridge, int nb,
364 bridge->r.data_lane0_reg1 = 1 << 1;
365 bridge->r.data_lane0_reg1 |= DATA_ENABLE;
370 static int mipid02_configure_data1_lane(struct mipid02_dev *bridge, int nb,
379 bridge->r.data_lane1_reg1 = 1 << 1;
380 bridge->r.data_lane1_reg1 |= DATA_ENABLE;
385 static int mipid02_configure_from_rx(struct mipid02_dev *bridge,
388 struct v4l2_fwnode_endpoint *ep = &bridge->rx;
394 ret = mipid02_configure_clk_lane(bridge);
398 ret = mipid02_configure_data0_lane(bridge, nb, are_lanes_swap,
403 ret = mipid02_configure_data1_lane(bridge, nb, are_lanes_swap,
408 bridge->r.mode_reg1 |= are_lanes_swap ? MODE_DATA_SWAP : 0;
409 bridge->r.mode_reg1 |= (nb - 1) << 1;
411 return mipid02_configure_from_rx_speed(bridge, fmt);
414 static int mipid02_configure_from_tx(struct mipid02_dev *bridge)
416 struct v4l2_fwnode_endpoint *ep = &bridge->tx;
418 bridge->r.data_selection_ctrl = SELECTION_MANUAL_WIDTH;
419 bridge->r.pix_width_ctrl = ep->bus.parallel.bus_width;
420 bridge->r.pix_width_ctrl_emb = ep->bus.parallel.bus_width;
422 bridge->r.mode_reg2 |= MODE_HSYNC_ACTIVE_HIGH;
424 bridge->r.mode_reg2 |= MODE_VSYNC_ACTIVE_HIGH;
426 bridge->r.mode_reg2 |= MODE_PCLK_SAMPLE_RISING;
431 static int mipid02_configure_from_code(struct mipid02_dev *bridge,
436 bridge->r.data_id_rreg = 0;
439 bridge->r.data_selection_ctrl |= SELECTION_MANUAL_DATA;
444 bridge->r.data_id_rreg = data_type;
450 static int mipid02_stream_disable(struct mipid02_dev *bridge)
452 struct i2c_client *client = bridge->i2c_client;
455 if (!bridge->s_subdev)
458 ret = v4l2_subdev_call(bridge->s_subdev, video, s_stream, 0);
463 cci_write(bridge->regmap, MIPID02_CLK_LANE_REG1, 0, &ret);
464 cci_write(bridge->regmap, MIPID02_DATA_LANE0_REG1, 0, &ret);
465 cci_write(bridge->regmap, MIPID02_DATA_LANE1_REG1, 0, &ret);
475 static int mipid02_stream_enable(struct mipid02_dev *bridge)
477 struct i2c_client *client = bridge->i2c_client;
482 if (!bridge->s_subdev)
485 memset(&bridge->r, 0, sizeof(bridge->r));
487 state = v4l2_subdev_lock_and_get_active_state(&bridge->sd);
491 ret = mipid02_configure_from_rx(bridge, fmt);
494 ret = mipid02_configure_from_tx(bridge);
497 ret = mipid02_configure_from_code(bridge, fmt);
504 cci_write(bridge->regmap, MIPID02_CLK_LANE_REG1,
505 bridge->r.clk_lane_reg1, &ret);
506 cci_write(bridge->regmap, MIPID02_CLK_LANE_REG3, CLK_MIPI_CSI, &ret);
507 cci_write(bridge->regmap, MIPID02_DATA_LANE0_REG1,
508 bridge->r.data_lane0_reg1, &ret);
509 cci_write(bridge->regmap, MIPID02_DATA_LANE0_REG2, DATA_MIPI_CSI, &ret);
510 cci_write(bridge->regmap, MIPID02_DATA_LANE1_REG1,
511 bridge->r.data_lane1_reg1, &ret);
512 cci_write(bridge->regmap, MIPID02_DATA_LANE1_REG2, DATA_MIPI_CSI, &ret);
513 cci_write(bridge->regmap, MIPID02_MODE_REG1,
514 MODE_NO_BYPASS | bridge->r.mode_reg1, &ret);
515 cci_write(bridge->regmap, MIPID02_MODE_REG2, bridge->r.mode_reg2, &ret);
516 cci_write(bridge->regmap, MIPID02_DATA_ID_RREG, bridge->r.data_id_rreg,
518 cci_write(bridge->regmap, MIPID02_DATA_SELECTION_CTRL,
519 bridge->r.data_selection_ctrl, &ret);
520 cci_write(bridge->regmap, MIPID02_PIX_WIDTH_CTRL,
521 bridge->r.pix_width_ctrl, &ret);
522 cci_write(bridge->regmap, MIPID02_PIX_WIDTH_CTRL_EMB,
523 bridge->r.pix_width_ctrl_emb, &ret);
527 ret = v4l2_subdev_call(bridge->s_subdev, video, s_stream, 1);
535 mipid02_stream_disable(bridge);
542 struct mipid02_dev *bridge = to_mipid02_dev(sd);
543 struct i2c_client *client = bridge->i2c_client;
548 ret = enable ? mipid02_stream_enable(bridge) :
549 mipid02_stream_disable(bridge);
612 struct mipid02_dev *bridge = to_mipid02_dev(sd);
613 struct i2c_client *client = bridge->i2c_client;
669 struct mipid02_dev *bridge = to_mipid02_dev(notifier->sd);
670 struct i2c_client *client = bridge->i2c_client;
686 &bridge->sd.entity, 0,
694 bridge->s_subdev = s_subdev;
703 struct mipid02_dev *bridge = to_mipid02_dev(notifier->sd);
705 bridge->s_subdev = NULL;
713 static int mipid02_parse_rx_ep(struct mipid02_dev *bridge)
716 struct i2c_client *client = bridge->i2c_client;
722 ep_node = of_graph_get_endpoint_by_regs(bridge->i2c_client->dev.of_node,
746 bridge->rx = ep;
749 v4l2_async_subdev_nf_init(&bridge->notifier, &bridge->sd);
750 asd = v4l2_async_nf_add_fwnode_remote(&bridge->notifier,
760 bridge->notifier.ops = &mipid02_notifier_ops;
762 ret = v4l2_async_nf_register(&bridge->notifier);
764 v4l2_async_nf_cleanup(&bridge->notifier);
775 static int mipid02_parse_tx_ep(struct mipid02_dev *bridge)
778 struct i2c_client *client = bridge->i2c_client;
783 ep_node = of_graph_get_endpoint_by_regs(bridge->i2c_client->dev.of_node,
798 bridge->tx = ep;
812 struct mipid02_dev *bridge;
816 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
817 if (!bridge)
820 bridge->i2c_client = client;
821 v4l2_i2c_subdev_init(&bridge->sd, client, &mipid02_subdev_ops);
824 bridge->xclk = devm_clk_get(dev, "xclk");
825 if (IS_ERR(bridge->xclk)) {
827 return PTR_ERR(bridge->xclk);
830 clk_freq = clk_get_rate(bridge->xclk);
837 bridge->reset_gpio = devm_gpiod_get_optional(dev, "reset",
840 if (IS_ERR(bridge->reset_gpio)) {
842 return PTR_ERR(bridge->reset_gpio);
845 ret = mipid02_get_regulators(bridge);
852 bridge->regmap = devm_cci_regmap_init_i2c(client, 16);
853 if (IS_ERR(bridge->regmap))
854 return dev_err_probe(dev, PTR_ERR(bridge->regmap),
857 bridge->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
858 bridge->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
859 bridge->sd.internal_ops = &mipid02_subdev_internal_ops;
860 bridge->sd.entity.ops = &mipid02_subdev_entity_ops;
861 bridge->pad[0].flags = MEDIA_PAD_FL_SINK;
862 bridge->pad[1].flags = MEDIA_PAD_FL_SINK;
863 bridge->pad[2].flags = MEDIA_PAD_FL_SOURCE;
864 ret = media_entity_pads_init(&bridge->sd.entity, MIPID02_PAD_NB,
865 bridge->pad);
871 ret = v4l2_subdev_init_finalize(&bridge->sd);
878 ret = mipid02_set_power_on(bridge);
882 ret = mipid02_detect(bridge);
888 ret = mipid02_parse_tx_ep(bridge);
894 ret = mipid02_parse_rx_ep(bridge);
900 ret = v4l2_async_register_subdev(&bridge->sd);
912 v4l2_async_nf_unregister(&bridge->notifier);
913 v4l2_async_nf_cleanup(&bridge->notifier);
915 mipid02_set_power_off(bridge);
917 media_entity_cleanup(&bridge->sd.entity);
925 struct mipid02_dev *bridge = to_mipid02_dev(sd);
927 v4l2_async_nf_unregister(&bridge->notifier);
928 v4l2_async_nf_cleanup(&bridge->notifier);
929 v4l2_async_unregister_subdev(&bridge->sd);
930 mipid02_set_power_off(bridge);
931 media_entity_cleanup(&bridge->sd.entity);
952 MODULE_DESCRIPTION("STMicroelectronics MIPID02 CSI-2 bridge driver");