Lines Matching refs:pll_rdiv
1565 u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div)
1572 *pll_rdiv = OV5640_PLL_ROOT_DIV;
1576 return _rate / *pll_rdiv / *bit_div / *pclk_div;
1581 u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div;
1589 ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv,
1615 0x1f, prediv | ((pll_rdiv - 1) << 4));
1862 u32 multiplier, prediv, VCO, sysdiv, pll_rdiv;
1891 pll_rdiv = ((temp1 >> 4) & 0x01) + 1;
1899 if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x)
1904 sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv;