Lines Matching defs:hi847

122 #define to_hi847(_sd) container_of(_sd, struct hi847, sd)
2168 struct hi847 {
2198 static int hi847_read_reg(struct hi847 *hi847, u16 reg, u16 len, u32 *val)
2200 struct i2c_client *client = v4l2_get_subdevdata(&hi847->sd);
2228 static int hi847_write_reg(struct hi847 *hi847, u16 reg, u16 len, u32 val)
2230 struct i2c_client *client = v4l2_get_subdevdata(&hi847->sd);
2244 static int hi847_write_reg_list(struct hi847 *hi847,
2247 struct i2c_client *client = v4l2_get_subdevdata(&hi847->sd);
2252 ret = hi847_write_reg(hi847, r_list->regs[i].address,
2266 static int hi847_update_digital_gain(struct hi847 *hi847, u32 d_gain)
2270 ret = hi847_write_reg(hi847, HI847_REG_MWB_GR_GAIN,
2275 ret = hi847_write_reg(hi847, HI847_REG_MWB_GB_GAIN,
2280 ret = hi847_write_reg(hi847, HI847_REG_MWB_R_GAIN,
2285 return hi847_write_reg(hi847, HI847_REG_MWB_B_GAIN,
2289 static int hi847_test_pattern(struct hi847 *hi847, u32 pattern)
2295 ret = hi847_read_reg(hi847, HI847_REG_ISP,
2300 ret = hi847_write_reg(hi847, HI847_REG_ISP,
2307 ret = hi847_read_reg(hi847, HI847_REG_TEST_PATTERN,
2312 return hi847_write_reg(hi847, HI847_REG_TEST_PATTERN,
2316 static int hi847_grbg_shift(struct hi847 *hi847)
2343 hflip = hi847->hflip->val;
2344 vflip = hi847->vflip->val;
2346 if (hi847->cur_mode->width == 3264) {
2347 ret = hi847_write_reg(hi847, HI847_REG_FORMAT_X,
2353 return hi847_write_reg(hi847, HI847_REG_FORMAT_Y,
2357 ret = hi847_write_reg(hi847, HI847_REG_FORMAT_X,
2363 return hi847_write_reg(hi847, HI847_REG_FORMAT_Y,
2369 static int hi847_set_ctrl_hflip(struct hi847 *hi847, u32 ctrl_val)
2374 ret = hi847_read_reg(hi847, HI847_REG_MIRROR_FLIP,
2379 ret = hi847_grbg_shift(hi847);
2383 return hi847_write_reg(hi847, HI847_REG_MIRROR_FLIP,
2388 static int hi847_set_ctrl_vflip(struct hi847 *hi847, u8 ctrl_val)
2393 ret = hi847_read_reg(hi847, HI847_REG_MIRROR_FLIP,
2398 ret = hi847_grbg_shift(hi847);
2402 return hi847_write_reg(hi847, HI847_REG_MIRROR_FLIP,
2409 struct hi847 *hi847 = container_of(ctrl->handler,
2410 struct hi847, ctrl_handler);
2411 struct i2c_client *client = v4l2_get_subdevdata(&hi847->sd);
2418 exposure_max = hi847->cur_mode->height + ctrl->val -
2420 __v4l2_ctrl_modify_range(hi847->exposure,
2421 hi847->exposure->minimum,
2422 exposure_max, hi847->exposure->step,
2432 ret = hi847_write_reg(hi847, HI847_REG_ANALOG_GAIN,
2437 ret = hi847_update_digital_gain(hi847, ctrl->val);
2441 ret = hi847_write_reg(hi847, HI847_REG_EXPOSURE,
2447 ret = hi847_write_reg(hi847, HI847_REG_FLL,
2449 hi847->cur_mode->height + ctrl->val);
2453 ret = hi847_test_pattern(hi847, ctrl->val);
2457 hi847_set_ctrl_hflip(hi847, ctrl->val);
2461 hi847_set_ctrl_vflip(hi847, ctrl->val);
2478 static int hi847_init_controls(struct hi847 *hi847)
2484 ctrl_hdlr = &hi847->ctrl_handler;
2489 ctrl_hdlr->lock = &hi847->mutex;
2490 hi847->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &hi847_ctrl_ops,
2494 if (hi847->link_freq)
2495 hi847->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
2497 hi847->pixel_rate = v4l2_ctrl_new_std
2503 hi847->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &hi847_ctrl_ops,
2505 hi847->cur_mode->fll_min -
2506 hi847->cur_mode->height,
2508 hi847->cur_mode->height, 1,
2509 hi847->cur_mode->fll_def -
2510 hi847->cur_mode->height);
2512 h_blank = hi847->cur_mode->llp - hi847->cur_mode->width;
2514 hi847->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &hi847_ctrl_ops,
2517 if (hi847->hblank)
2518 hi847->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
2526 exposure_max = hi847->cur_mode->fll_def - HI847_EXPOSURE_MAX_MARGIN;
2527 hi847->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &hi847_ctrl_ops,
2536 hi847->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &hi847_ctrl_ops,
2538 hi847->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &hi847_ctrl_ops,
2544 hi847->sd.ctrl_handler = ctrl_hdlr;
2558 static int hi847_start_streaming(struct hi847 *hi847)
2560 struct i2c_client *client = v4l2_get_subdevdata(&hi847->sd);
2564 link_freq_index = hi847->cur_mode->link_freq_index;
2566 ret = hi847_write_reg_list(hi847, reg_list);
2572 reg_list = &hi847->cur_mode->reg_list;
2573 ret = hi847_write_reg_list(hi847, reg_list);
2579 ret = __v4l2_ctrl_handler_setup(hi847->sd.ctrl_handler);
2583 ret = hi847_write_reg(hi847, HI847_REG_MODE_TG,
2586 ret = hi847_write_reg(hi847, HI847_REG_MODE_SELECT,
2597 static void hi847_stop_streaming(struct hi847 *hi847)
2599 struct i2c_client *client = v4l2_get_subdevdata(&hi847->sd);
2601 if (hi847_write_reg(hi847, HI847_REG_MODE_TG,
2606 if (hi847_write_reg(hi847, HI847_REG_MODE_SELECT,
2614 struct hi847 *hi847 = to_hi847(sd);
2618 mutex_lock(&hi847->mutex);
2622 mutex_unlock(&hi847->mutex);
2626 ret = hi847_start_streaming(hi847);
2629 hi847_stop_streaming(hi847);
2633 hi847_stop_streaming(hi847);
2637 mutex_unlock(&hi847->mutex);
2646 struct hi847 *hi847 = to_hi847(sd);
2655 mutex_lock(&hi847->mutex);
2661 hi847->cur_mode = mode;
2662 __v4l2_ctrl_s_ctrl(hi847->link_freq, mode->link_freq_index);
2663 __v4l2_ctrl_s_ctrl_int64(hi847->pixel_rate,
2668 __v4l2_ctrl_modify_range(hi847->vblank,
2672 __v4l2_ctrl_s_ctrl(hi847->vblank, vblank_def);
2674 h_blank = hi847->cur_mode->llp - hi847->cur_mode->width;
2676 __v4l2_ctrl_modify_range(hi847->hblank, h_blank, h_blank, 1,
2680 mutex_unlock(&hi847->mutex);
2689 struct hi847 *hi847 = to_hi847(sd);
2691 mutex_lock(&hi847->mutex);
2696 hi847_assign_pad_format(hi847->cur_mode, &fmt->format);
2698 mutex_unlock(&hi847->mutex);
2735 struct hi847 *hi847 = to_hi847(sd);
2737 mutex_lock(&hi847->mutex);
2740 mutex_unlock(&hi847->mutex);
2769 static int hi847_identify_module(struct hi847 *hi847)
2771 struct i2c_client *client = v4l2_get_subdevdata(&hi847->sd);
2775 ret = hi847_read_reg(hi847, HI847_REG_CHIP_ID,
2860 struct hi847 *hi847 = to_hi847(sd);
2866 mutex_destroy(&hi847->mutex);
2871 struct hi847 *hi847;
2874 hi847 = devm_kzalloc(&client->dev, sizeof(*hi847), GFP_KERNEL);
2875 if (!hi847)
2885 v4l2_i2c_subdev_init(&hi847->sd, client, &hi847_subdev_ops);
2886 ret = hi847_identify_module(hi847);
2892 mutex_init(&hi847->mutex);
2893 hi847->cur_mode = &supported_modes[0];
2894 ret = hi847_init_controls(hi847);
2900 hi847->sd.internal_ops = &hi847_internal_ops;
2901 hi847->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
2902 hi847->sd.entity.ops = &hi847_subdev_entity_ops;
2903 hi847->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
2904 hi847->pad.flags = MEDIA_PAD_FL_SOURCE;
2905 ret = media_entity_pads_init(&hi847->sd.entity, 1, &hi847->pad);
2911 ret = v4l2_async_register_subdev_sensor(&hi847->sd);
2925 media_entity_cleanup(&hi847->sd.entity);
2928 v4l2_ctrl_handler_free(hi847->sd.ctrl_handler);
2929 mutex_destroy(&hi847->mutex);
2945 .name = "hi847",