Lines Matching refs:ret

345 	int ret = 0;
348 alvium_write(alvium, REG_BCRM_WRITE_HANDSHAKE_RW, 0, &ret);
349 alvium_write(alvium, reg, val, &ret);
350 if (ret) {
352 return ret;
360 &hshake_bit, &ret);
361 if (ret) {
363 return ret;
367 alvium_write(alvium, REG_BCRM_WRITE_HANDSHAKE_RW, 0, &ret);
368 if (ret) {
370 return ret;
378 &hshake_bit, &ret);
379 if (ret) {
381 return ret;
391 int ret = 0;
393 ret = alvium_read(alvium, REG_BCRM_MINOR_VERSION_R, &min, &ret);
394 ret = alvium_read(alvium, REG_BCRM_MAJOR_VERSION_R, &maj, &ret);
395 if (ret)
396 return ret;
407 int ret = 0;
409 ret = alvium_read(alvium, REG_BCRM_DEVICE_FW_SPEC_VERSION_R,
410 &spec, &ret);
411 ret = alvium_read(alvium, REG_BCRM_DEVICE_FW_MAJOR_VERSION_R,
412 &maj, &ret);
413 ret = alvium_read(alvium, REG_BCRM_DEVICE_FW_MINOR_VERSION_R,
414 &min, &ret);
415 ret = alvium_read(alvium, REG_BCRM_DEVICE_FW_PATCH_VERSION_R,
416 &pat, &ret);
417 if (ret)
418 return ret;
428 int ret;
430 ret = alvium_read(alvium, REG_BCRM_REG_ADDR_R, &val, NULL);
431 if (ret)
432 return ret;
442 int ret = 0;
444 alvium_read(alvium, REG_BCRM_MINOR_VERSION_R, &bcrm, &ret);
445 alvium_read(alvium, REG_BCRM_HEARTBEAT_RW, &hbeat, &ret);
446 if (ret)
447 return ret;
542 int ret;
544 ret = alvium_read(alvium, REG_BCRM_FEATURE_INQUIRY_R, &val, NULL);
545 if (ret)
546 return ret;
558 int ret;
560 ret = alvium_read(alvium, REG_BCRM_CSI2_LANE_COUNT_RW, &val, NULL);
561 if (ret)
562 return ret;
573 int ret;
580 ret = alvium_write_hshake(alvium, REG_BCRM_CSI2_LANE_COUNT_RW,
582 if (ret) {
584 return ret;
593 int ret = 0;
606 ALVIUM_LP2HS_DELAY_MS, &ret);
607 if (ret) {
609 return ret;
618 int ret = 0;
620 alvium_read(alvium, REG_BCRM_CSI2_CLOCK_MIN_R, &min_csi_clk, &ret);
621 alvium_read(alvium, REG_BCRM_CSI2_CLOCK_MAX_R, &max_csi_clk, &ret);
622 if (ret)
623 return ret;
635 int ret;
647 ret = alvium_write_hshake(alvium, REG_BCRM_CSI2_CLOCK_RW, csi_clk);
648 if (ret) {
650 return ret;
661 int ret = 0;
663 alvium_read(alvium, REG_BCRM_IMG_WIDTH_RW, &imgw, &ret);
664 alvium_read(alvium, REG_BCRM_IMG_WIDTH_MIN_R, &imgw_min, &ret);
665 alvium_read(alvium, REG_BCRM_IMG_WIDTH_MAX_R, &imgw_max, &ret);
666 alvium_read(alvium, REG_BCRM_IMG_WIDTH_INC_R, &imgw_inc, &ret);
667 if (ret)
668 return ret;
681 int ret = 0;
683 alvium_read(alvium, REG_BCRM_IMG_HEIGHT_RW, &imgh, &ret);
684 alvium_read(alvium, REG_BCRM_IMG_HEIGHT_MIN_R, &imgh_min, &ret);
685 alvium_read(alvium, REG_BCRM_IMG_HEIGHT_MAX_R, &imgh_max, &ret);
686 alvium_read(alvium, REG_BCRM_IMG_HEIGHT_INC_R, &imgh_inc, &ret);
687 if (ret)
688 return ret;
701 int ret;
703 ret = alvium_write_hshake(alvium, REG_BCRM_IMG_WIDTH_RW, width);
704 if (ret) {
706 return ret;
715 int ret;
717 ret = alvium_write_hshake(alvium, REG_BCRM_IMG_HEIGHT_RW, height);
718 if (ret) {
720 return ret;
729 int ret;
731 ret = alvium_write_hshake(alvium, REG_BCRM_IMG_OFFSET_X_RW, offx);
732 if (ret) {
734 return ret;
743 int ret;
745 ret = alvium_write_hshake(alvium, REG_BCRM_IMG_OFFSET_Y_RW, offy);
746 if (ret) {
748 return ret;
757 int ret = 0;
759 alvium_read(alvium, REG_BCRM_IMG_OFFSET_X_MIN_R, &min_offx, &ret);
760 alvium_read(alvium, REG_BCRM_IMG_OFFSET_X_MAX_R, &max_offx, &ret);
761 alvium_read(alvium, REG_BCRM_IMG_OFFSET_X_INC_R, &inc_offx, &ret);
762 if (ret)
763 return ret;
775 int ret = 0;
777 alvium_read(alvium, REG_BCRM_IMG_OFFSET_Y_MIN_R, &min_offy, &ret);
778 alvium_read(alvium, REG_BCRM_IMG_OFFSET_Y_MAX_R, &max_offy, &ret);
779 alvium_read(alvium, REG_BCRM_IMG_OFFSET_Y_INC_R, &inc_offy, &ret);
780 if (ret)
781 return ret;
793 int ret = 0;
795 alvium_read(alvium, REG_BCRM_GAIN_RW, &dft_gain, &ret);
796 alvium_read(alvium, REG_BCRM_GAIN_MIN_R, &min_gain, &ret);
797 alvium_read(alvium, REG_BCRM_GAIN_MAX_R, &max_gain, &ret);
798 alvium_read(alvium, REG_BCRM_GAIN_INC_R, &inc_gain, &ret);
799 if (ret)
800 return ret;
813 int ret = 0;
815 alvium_read(alvium, REG_BCRM_EXPOSURE_TIME_RW, &dft_exp, &ret);
816 alvium_read(alvium, REG_BCRM_EXPOSURE_TIME_MIN_R, &min_exp, &ret);
817 alvium_read(alvium, REG_BCRM_EXPOSURE_TIME_MAX_R, &max_exp, &ret);
818 alvium_read(alvium, REG_BCRM_EXPOSURE_TIME_INC_R, &inc_exp, &ret);
819 if (ret)
820 return ret;
833 int ret = 0;
835 alvium_read(alvium, REG_BCRM_RED_BALANCE_RATIO_RW, &dft_rb, &ret);
836 alvium_read(alvium, REG_BCRM_RED_BALANCE_RATIO_MIN_R, &min_rb, &ret);
837 alvium_read(alvium, REG_BCRM_RED_BALANCE_RATIO_MAX_R, &max_rb, &ret);
838 alvium_read(alvium, REG_BCRM_RED_BALANCE_RATIO_INC_R, &inc_rb, &ret);
839 if (ret)
840 return ret;
853 int ret = 0;
855 alvium_read(alvium, REG_BCRM_BLUE_BALANCE_RATIO_RW, &dft_bb, &ret);
856 alvium_read(alvium, REG_BCRM_BLUE_BALANCE_RATIO_MIN_R, &min_bb, &ret);
857 alvium_read(alvium, REG_BCRM_BLUE_BALANCE_RATIO_MAX_R, &max_bb, &ret);
858 alvium_read(alvium, REG_BCRM_BLUE_BALANCE_RATIO_INC_R, &inc_bb, &ret);
859 if (ret)
860 return ret;
873 int ret = 0;
875 alvium_read(alvium, REG_BCRM_HUE_RW, &dft_hue, &ret);
876 alvium_read(alvium, REG_BCRM_HUE_MIN_R, &min_hue, &ret);
877 alvium_read(alvium, REG_BCRM_HUE_MAX_R, &max_hue, &ret);
878 alvium_read(alvium, REG_BCRM_HUE_INC_R, &inc_hue, &ret);
879 if (ret)
880 return ret;
893 int ret = 0;
895 alvium_read(alvium, REG_BCRM_BLACK_LEVEL_RW, &dft_blvl, &ret);
896 alvium_read(alvium, REG_BCRM_BLACK_LEVEL_MIN_R, &min_blvl, &ret);
897 alvium_read(alvium, REG_BCRM_BLACK_LEVEL_MAX_R, &max_blvl, &ret);
898 alvium_read(alvium, REG_BCRM_BLACK_LEVEL_INC_R, &inc_blvl, &ret);
899 if (ret)
900 return ret;
913 int ret = 0;
915 alvium_read(alvium, REG_BCRM_GAMMA_RW, &dft_g, &ret);
916 alvium_read(alvium, REG_BCRM_GAMMA_MIN_R, &min_g, &ret);
917 alvium_read(alvium, REG_BCRM_GAMMA_MAX_R, &max_g, &ret);
918 alvium_read(alvium, REG_BCRM_GAMMA_INC_R, &inc_g, &ret);
919 if (ret)
920 return ret;
933 int ret = 0;
935 alvium_read(alvium, REG_BCRM_SHARPNESS_RW, &dft_sh, &ret);
936 alvium_read(alvium, REG_BCRM_SHARPNESS_MIN_R, &min_sh, &ret);
937 alvium_read(alvium, REG_BCRM_BLACK_LEVEL_MAX_R, &max_sh, &ret);
938 alvium_read(alvium, REG_BCRM_SHARPNESS_INC_R, &inc_sh, &ret);
939 if (ret)
940 return ret;
953 int ret = 0;
955 alvium_read(alvium, REG_BCRM_CONTRAST_VALUE_RW, &dft_c, &ret);
956 alvium_read(alvium, REG_BCRM_CONTRAST_VALUE_MIN_R, &min_c, &ret);
957 alvium_read(alvium, REG_BCRM_CONTRAST_VALUE_MAX_R, &max_c, &ret);
958 alvium_read(alvium, REG_BCRM_CONTRAST_VALUE_INC_R, &inc_c, &ret);
959 if (ret)
960 return ret;
973 int ret = 0;
975 alvium_read(alvium, REG_BCRM_SATURATION_RW, &dft_sat, &ret);
976 alvium_read(alvium, REG_BCRM_SATURATION_MIN_R, &min_sat, &ret);
977 alvium_read(alvium, REG_BCRM_SATURATION_MAX_R, &max_sat, &ret);
978 alvium_read(alvium, REG_BCRM_SATURATION_INC_R, &inc_sat, &ret);
979 if (ret)
980 return ret;
992 int ret = 0;
994 alvium_write(alvium, REG_GENCP_CHANGEMODE_W, ALVIUM_BCM_MODE, &ret);
997 return ret;
1003 int ret;
1005 ret = alvium_read(alvium, REG_GENCP_CURRENTMODE_R, &bcrm_mode, NULL);
1006 if (ret)
1007 return ret;
1025 int ret;
1027 ret = alvium_read(alvium, REG_BCRM_IMG_AVAILABLE_MIPI_DATA_FORMATS_R,
1029 if (ret)
1030 return ret;
1121 int ret;
1123 ret = alvium_write_hshake(alvium, REG_BCRM_IMG_MIPI_DATA_FORMAT_RW,
1125 if (ret) {
1127 return ret;
1137 int ret;
1139 ret = alvium_read(alvium, REG_BCRM_IMG_BAYER_PATTERN_INQUIRY_R,
1141 if (ret)
1142 return ret;
1161 int ret;
1163 ret = alvium_write_hshake(alvium, REG_BCRM_IMG_BAYER_PATTERN_RW,
1165 if (ret) {
1167 return ret;
1176 int ret = 0;
1179 min_fr, &ret);
1181 max_fr, &ret);
1183 return ret;
1189 int ret;
1191 ret = alvium_write_hshake(alvium, REG_BCRM_ACQUISITION_FRAME_RATE_RW,
1193 if (ret) {
1195 return ret;
1206 int ret;
1208 ret = alvium_write_hshake(alvium, on ? REG_BCRM_ACQUISITION_START_RW :
1210 if (ret) {
1212 return ret;
1221 int ret;
1224 ret = alvium_read(alvium, REG_BCRM_GAIN_RW, &gain, NULL);
1225 if (ret)
1226 return ret;
1234 int ret;
1237 ret = alvium_write_hshake(alvium, REG_BCRM_GAIN_RW, (u64)gain);
1238 if (ret) {
1240 return ret;
1249 int ret;
1251 ret = alvium_write_hshake(alvium, REG_BCRM_GAIN_AUTO_RW,
1253 if (ret) {
1255 return ret;
1264 int ret;
1267 ret = alvium_read(alvium, REG_BCRM_EXPOSURE_TIME_RW, &exp, NULL);
1268 if (ret)
1269 return ret;
1277 int ret;
1279 ret = alvium_write_hshake(alvium, REG_BCRM_WHITE_BALANCE_AUTO_RW,
1281 if (ret) {
1283 return ret;
1292 int ret;
1294 ret = alvium_write_hshake(alvium, REG_BCRM_EXPOSURE_TIME_RW,
1296 if (ret) {
1298 return ret;
1308 int ret;
1310 ret = alvium_write_hshake(alvium, REG_BCRM_BLUE_BALANCE_RATIO_RW,
1312 if (ret) {
1314 return ret;
1323 int ret;
1325 ret = alvium_write_hshake(alvium, REG_BCRM_RED_BALANCE_RATIO_RW,
1327 if (ret) {
1329 return ret;
1338 int ret;
1340 ret = alvium_write_hshake(alvium, REG_BCRM_WHITE_BALANCE_AUTO_RW,
1342 if (ret) {
1344 return ret;
1353 int ret;
1355 ret = alvium_write_hshake(alvium, REG_BCRM_HUE_RW, (u64)val);
1356 if (ret) {
1358 return ret;
1367 int ret;
1369 ret = alvium_write_hshake(alvium, REG_BCRM_CONTRAST_VALUE_RW, (u64)val);
1370 if (ret) {
1372 return ret;
1381 int ret;
1383 ret = alvium_write_hshake(alvium, REG_BCRM_SATURATION_RW, (u64)val);
1384 if (ret) {
1386 return ret;
1395 int ret;
1397 ret = alvium_write_hshake(alvium, REG_BCRM_GAMMA_RW, (u64)val);
1398 if (ret) {
1400 return ret;
1409 int ret;
1411 ret = alvium_write_hshake(alvium, REG_BCRM_SHARPNESS_RW, (u64)val);
1412 if (ret) {
1414 return ret;
1423 int ret;
1425 ret = alvium_write_hshake(alvium, REG_BCRM_IMG_REVERSE_X_RW, (u64)val);
1426 if (ret) {
1428 return ret;
1437 int ret;
1439 ret = alvium_write_hshake(alvium, REG_BCRM_IMG_REVERSE_Y_RW, (u64)val);
1440 if (ret) {
1442 return ret;
1451 int ret;
1453 ret = alvium_get_csi_clk_params(alvium);
1454 if (ret) {
1456 return ret;
1459 ret = alvium_get_img_width_params(alvium);
1460 if (ret) {
1462 return ret;
1465 ret = alvium_get_img_height_params(alvium);
1466 if (ret) {
1468 return ret;
1471 ret = alvium_get_offx_params(alvium);
1472 if (ret) {
1474 return ret;
1477 ret = alvium_get_offy_params(alvium);
1478 if (ret) {
1480 return ret;
1483 ret = alvium_get_gain_params(alvium);
1484 if (ret) {
1486 return ret;
1489 ret = alvium_get_exposure_params(alvium);
1490 if (ret) {
1492 return ret;
1495 ret = alvium_get_red_balance_ratio_params(alvium);
1496 if (ret) {
1498 return ret;
1501 ret = alvium_get_blue_balance_ratio_params(alvium);
1502 if (ret) {
1504 return ret;
1507 ret = alvium_get_hue_params(alvium);
1508 if (ret) {
1510 return ret;
1513 ret = alvium_get_contrast_params(alvium);
1514 if (ret) {
1516 return ret;
1519 ret = alvium_get_saturation_params(alvium);
1520 if (ret) {
1522 return ret;
1525 ret = alvium_get_black_lvl_params(alvium);
1526 if (ret) {
1528 return ret;
1531 ret = alvium_get_gamma_params(alvium);
1532 if (ret) {
1534 return ret;
1537 ret = alvium_get_sharpness_params(alvium);
1538 if (ret) {
1540 return ret;
1549 int ret;
1551 ret = alvium_get_bcrm_vers(alvium);
1552 if (ret) {
1554 return ret;
1557 ret = alvium_get_bcrm_addr(alvium);
1558 if (ret) {
1560 return ret;
1563 ret = alvium_get_fw_version(alvium);
1564 if (ret) {
1566 return ret;
1569 ret = alvium_get_host_supp_csi_lanes(alvium);
1570 if (ret) {
1572 return ret;
1575 ret = alvium_get_feat_inq(alvium);
1576 if (ret) {
1578 return ret;
1581 ret = alvium_get_hw_features_params(alvium);
1582 if (ret) {
1584 return ret;
1587 ret = alvium_get_avail_mipi_data_format(alvium);
1588 if (ret) {
1590 return ret;
1593 ret = alvium_get_avail_bayer(alvium);
1594 if (ret) {
1596 return ret;
1599 ret = alvium_get_mode(alvium);
1600 if (ret) {
1602 return ret;
1611 int ret;
1614 ret = alvium_set_bcm_mode(alvium);
1615 if (ret) {
1617 return ret;
1620 ret = alvium_set_csi_lanes(alvium);
1621 if (ret) {
1623 return ret;
1626 ret = alvium_set_csi_clk(alvium);
1627 if (ret) {
1629 return ret;
1632 ret = alvium_set_lp2hs_delay(alvium);
1633 if (ret) {
1635 return ret;
1650 int ret;
1658 ret = alvium_get_frame_interval(alvium, &min_fr, &max_fr);
1659 if (ret) {
1661 return ret;
1715 int ret;
1731 ret = alvium_set_img_width(alvium, fmt->width);
1732 if (ret)
1733 return ret;
1735 ret = alvium_set_img_height(alvium, fmt->height);
1736 if (ret)
1737 return ret;
1739 ret = alvium_set_img_offx(alvium, crop->left);
1740 if (ret)
1741 return ret;
1743 ret = alvium_set_img_offy(alvium, crop->top);
1744 if (ret)
1745 return ret;
1755 int ret = 0;
1759 ret = alvium_set_mipi_fmt(alvium, alvium_csi2_fmt);
1760 if (ret)
1761 return ret;
1764 ret = alvium_set_bayer_pattern(alvium, alvium_csi2_fmt);
1765 if (ret)
1766 return ret;
1772 return ret;
1781 int ret = 0;
1786 ret = pm_runtime_resume_and_get(&client->dev);
1787 if (ret < 0)
1790 ret = __v4l2_ctrl_handler_setup(&alvium->ctrls.handler);
1791 if (ret)
1794 ret = alvium_set_mode(alvium, state);
1795 if (ret)
1799 ret = alvium_set_framefmt(alvium, fmt);
1800 if (ret)
1803 ret = alvium_set_stream_mipi(alvium, enable);
1804 if (ret)
1821 return ret;
1987 int ret;
1998 ret = alvium_set_ctrl_gain(alvium, ctrl->val);
2001 ret = alvium_set_ctrl_auto_gain(alvium, ctrl->val);
2004 ret = alvium_set_ctrl_exposure(alvium, ctrl->val);
2007 ret = alvium_set_ctrl_auto_exposure(alvium, ctrl->val);
2010 ret = alvium_set_ctrl_red_balance_ratio(alvium, ctrl->val);
2013 ret = alvium_set_ctrl_blue_balance_ratio(alvium, ctrl->val);
2016 ret = alvium_set_ctrl_awb(alvium, ctrl->val);
2019 ret = alvium_set_ctrl_hue(alvium, ctrl->val);
2022 ret = alvium_set_ctrl_contrast(alvium, ctrl->val);
2025 ret = alvium_set_ctrl_saturation(alvium, ctrl->val);
2028 ret = alvium_set_ctrl_gamma(alvium, ctrl->val);
2031 ret = alvium_set_ctrl_sharpness(alvium, ctrl->val);
2034 ret = alvium_set_ctrl_hflip(alvium, ctrl->val);
2037 ret = alvium_set_ctrl_vflip(alvium, ctrl->val);
2040 ret = -EINVAL;
2046 return ret;
2060 int ret;
2185 ret = hdl->error;
2189 ret = v4l2_fwnode_device_parse(&alvium->i2c_client->dev, &props);
2190 if (ret)
2193 ret = v4l2_ctrl_new_fwnode_properties(hdl, ops, &props);
2194 if (ret)
2202 return ret;
2240 int ret;
2259 ret = media_entity_pads_init(&sd->entity, 1, &alvium->pad);
2260 if (ret) {
2262 return ret;
2265 ret = alvium_ctrl_init(alvium);
2266 if (ret) {
2267 dev_err(dev, "Control initialization error %d\n", ret);
2273 ret = v4l2_subdev_init_finalize(sd);
2274 if (ret < 0) {
2275 dev_err(dev, "subdev initialization error %d\n", ret);
2285 return ret;
2335 int ret;
2340 ret = regulator_enable(alvium->reg_vcc);
2341 if (ret)
2342 return ret;
2353 int ret;
2355 ret = alvium_set_power(alvium, true);
2356 if (ret)
2357 return ret;
2359 ret = alvium_hw_init(alvium);
2360 if (ret) {
2362 return ret;
2386 int ret;
2398 ret = alvium_get_dt_data(alvium);
2399 if (ret)
2400 return ret;
2407 ret = alvium_set_power(alvium, true);
2408 if (ret)
2412 ret = -ENODEV;
2413 dev_err_probe(dev, ret, "Device detection failed\n");
2417 ret = alvium_get_hw_info(alvium);
2418 if (ret) {
2419 dev_err_probe(dev, ret, "get_hw_info fail\n");
2423 ret = alvium_hw_init(alvium);
2424 if (ret) {
2425 dev_err_probe(dev, ret, "hw_init fail\n");
2429 ret = alvium_setup_mipi_fmt(alvium);
2430 if (ret) {
2431 dev_err_probe(dev, ret, "setup_mipi_fmt fail\n");
2448 ret = alvium_subdev_init(alvium);
2449 if (ret)
2452 ret = v4l2_async_register_subdev(&alvium->sd);
2453 if (ret < 0) {
2454 dev_err_probe(dev, ret, "Could not register v4l2 device\n");
2469 return ret;