media/dvb-frontends/stv0900_core.c

180 void stv0900_write_bits(struct stv0900_internal *intp, u32 label, u8 val)
300 	stv0900_write_bits(intp, F0900_M_DIV, m_div);
353 	stv0900_write_bits(intp, I2CT_ON, enable);
380 				stv0900_write_bits(intp,
382 				stv0900_write_bits(intp,
425 				stv0900_write_bits(intp,
427 				stv0900_write_bits(intp,
461 		stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x00);
462 		stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x00);
465 		stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x00);
466 		stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x01);
469 		stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x01);
470 		stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x00);
473 		stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x01);
474 		stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x01);
482 		stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x00);
483 		stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x00);
486 		stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x00);
487 		stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x01);
490 		stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x01);
491 		stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x00);
494 		stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x01);
495 		stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x01);
501 	stv0900_write_bits(intp, F0900_P2_RST_HWARE, 1);
502 	stv0900_write_bits(intp, F0900_P2_RST_HWARE, 0);
503 	stv0900_write_bits(intp, F0900_P1_RST_HWARE, 1);
504 	stv0900_write_bits(intp, F0900_P1_RST_HWARE, 0);
581 	stv0900_write_bits(intp, TUN_RFFREQ2, (tunerFrequency >> 10));
582 	stv0900_write_bits(intp, TUN_RFFREQ1, (tunerFrequency >> 2) & 0xff);
583 	stv0900_write_bits(intp, TUN_RFFREQ0, (tunerFrequency & 0x03));
585 	stv0900_write_bits(intp, TUN_BW, Bandwidth / 2000000);
962 	stv0900_write_bits(intp, DEMOD_MODE, 0x1f);
1005 		stv0900_write_bits(intp, CFR_UP1, MSB(freq_s16));
1006 		stv0900_write_bits(intp, CFR_UP0, LSB(freq_s16));
1008 		stv0900_write_bits(intp, CFR_LOW1, MSB(freq_s16));
1009 		stv0900_write_bits(intp, CFR_LOW0, LSB(freq_s16));
1031 	stv0900_write_bits(intp, SCAN_ENABLE, 0);
1032 	stv0900_write_bits(intp, CFR_AUTOSCAN, 0);
1033 	stv0900_write_bits(intp, S1S2_SEQUENTIAL, 0);
1275 			stv0900_write_bits(intp, F0900_FRESFEC, 1);
1276 			stv0900_write_bits(intp, F0900_FRESFEC, 0);
1319 		stv0900_write_bits(intp, F0900_FRESFEC, 1);
1320 		stv0900_write_bits(intp, F0900_FRESFEC, 0);
1321 		stv0900_write_bits(intp, F0900_P1_ALGOSWRST, 1);
1322 		stv0900_write_bits(intp, F0900_P1_ALGOSWRST, 0);
1323 		stv0900_write_bits(intp, F0900_P2_ALGOSWRST, 1);
1324 		stv0900_write_bits(intp, F0900_P2_ALGOSWRST, 0);
1394 	stv0900_write_bits(intp, F0900_P1_ROLLOFF_CONTROL, p_init->rolloff);
1395 	stv0900_write_bits(intp, F0900_P2_ROLLOFF_CONTROL, p_init->rolloff);
1408 		stv0900_write_bits(intp, F0900_P2_RST_HWARE, 1);
1409 		stv0900_write_bits(intp, F0900_P2_RST_HWARE, 0);
1410 		stv0900_write_bits(intp, F0900_P1_RST_HWARE, 1);
1411 		stv0900_write_bits(intp, F0900_P1_RST_HWARE, 0);
1427 		stv0900_write_bits(intp, F0900_P1_TUN_TYPE, 3);
1431 		stv0900_write_bits(intp, F0900_P1_TUN_TYPE, 6);
1435 	stv0900_write_bits(intp, F0900_P1_TUN_MADDRESS, p_init->tun1_maddress);
1457 		stv0900_write_bits(intp, F0900_P2_TUN_TYPE, 3);
1461 		stv0900_write_bits(intp, F0900_P2_TUN_TYPE, 6);
1465 	stv0900_write_bits(intp, F0900_P2_TUN_MADDRESS, p_init->tun2_maddress);
1476 	stv0900_write_bits(intp, F0900_P1_TUN_IQSWAP, p_init->tun1_iq_inv);
1477 	stv0900_write_bits(intp, F0900_P2_TUN_IQSWAP, p_init->tun2_iq_inv);
1550 		stv0900_write_bits(intp, FILTER_EN, 0);
1553 		stv0900_write_bits(intp, FILTER_EN, 1);
1672 		stv0900_write_bits(intp, RST_HWARE, 1);
1674 		stv0900_write_bits(intp, RST_HWARE, 0);
1685 	stv0900_write_bits(intp, DISTX_MODE, state->config->diseqc_mode);
1686 	stv0900_write_bits(intp, DISEQC_RESET, 1);
1687 	stv0900_write_bits(intp, DISEQC_RESET, 0);
1707 	stv0900_write_bits(intp, DIS_PRECHARGE, 1);
1715 	stv0900_write_bits(intp, DIS_PRECHARGE, 0);
1747 		stv0900_write_bits(intp, DISTX_MODE, 3);/* Unmodulated */
1752 		stv0900_write_bits(intp, DISTX_MODE, 2);/* Modulated */
1798 		stv0900_write_bits(intp, DISTX_MODE, 0);
1799 		stv0900_write_bits(intp, DISEQC_RESET, 1);
1801 		stv0900_write_bits(intp, DISEQC_RESET, 0);
1806 		stv0900_write_bits(intp, DISTX_MODE,
1809 		stv0900_write_bits(intp, DISEQC_RESET, 1);
1810 		stv0900_write_bits(intp, DISEQC_RESET, 0);