Lines Matching refs:mpeg_interface_cfg
1702 struct MXL_HYDRA_MPEGOUT_PARAM_T mpeg_interface_cfg;
1797 mpeg_interface_cfg.enable = MXL_ENABLE;
1798 mpeg_interface_cfg.lsb_or_msb_first = MXL_HYDRA_MPEG_SERIAL_MSB_1ST;
1801 mpeg_interface_cfg.max_mpeg_clk_rate = cfg->ts_clk;
1803 mpeg_interface_cfg.max_mpeg_clk_rate = 69; /* 139; */
1804 mpeg_interface_cfg.mpeg_clk_phase = MXL_HYDRA_MPEG_CLK_PHASE_SHIFT_0_DEG;
1805 mpeg_interface_cfg.mpeg_clk_pol = MXL_HYDRA_MPEG_CLK_IN_PHASE;
1807 mpeg_interface_cfg.mpeg_clk_type = MXL_HYDRA_MPEG_CLK_CONTINUOUS;
1808 mpeg_interface_cfg.mpeg_error_indication =
1810 mpeg_interface_cfg.mpeg_mode = MXL_HYDRA_MPEG_MODE_SERIAL_3_WIRE;
1811 mpeg_interface_cfg.mpeg_sync_pol = MXL_HYDRA_MPEG_ACTIVE_HIGH;
1812 mpeg_interface_cfg.mpeg_sync_pulse_width = MXL_HYDRA_MPEG_SYNC_WIDTH_BIT;
1813 mpeg_interface_cfg.mpeg_valid_pol = MXL_HYDRA_MPEG_ACTIVE_HIGH;
1817 &mpeg_interface_cfg);