media/dvb-frontends/lgdt3305.c

101 static int lgdt3305_write_reg(struct lgdt3305_state *state, u16 reg, u8 val)
175 	ret = lgdt3305_write_reg(state, reg, val);
193 		ret = lgdt3305_write_reg(state, regs[i].reg, regs[i].val);
248 	ret = lgdt3305_write_reg(state, LGDT3305_TP_CTRL_1, val);
284 	ret = lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_1, opermode);
333 	lgdt3305_write_reg(state, LGDT3305_DGTL_AGC_REF_1, agc_ref >> 8);
334 	lgdt3305_write_reg(state, LGDT3305_DGTL_AGC_REF_2, agc_ref & 0xff);
369 		lgdt3305_write_reg(state, LGDT3305_AGC_DELAY_PT_1,
371 		lgdt3305_write_reg(state, LGDT3305_AGC_DELAY_PT_2,
374 		lgdt3305_write_reg(state, LGDT3305_RFAGC_LOOP_FLTR_BW_1,
376 		lgdt3305_write_reg(state, LGDT3305_RFAGC_LOOP_FLTR_BW_2,
382 		lgdt3305_write_reg(state, LGDT3305_IFBW_1, ifbw >> 8);
383 		lgdt3305_write_reg(state, LGDT3305_IFBW_2, ifbw & 0xff);
413 		lgdt3305_write_reg(state, 0x0314, 0xe1 | lockdten << 1);
417 		lgdt3305_write_reg(state, LGDT3305_AGC_CTRL_4, 0xe1 | lockdten << 1);
454 		lgdt3305_write_reg(state, LGDT3305_AGC_POWER_REF_1,
456 		lgdt3305_write_reg(state, LGDT3305_AGC_POWER_REF_2,
474 		ret = lgdt3305_write_reg(state, LGDT3305_CR_CTRL_7,
479 		ret = lgdt3305_write_reg(state, LGDT3305_FEC_BLOCK_CTRL,
529 	lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_1, nco1);
530 	lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_2, nco2);
531 	lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_3, nco3);
532 	lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_4, nco4);
577 	lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_3, gen_ctrl_3);
578 	lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_4, gen_ctrl_4);
701 		lgdt3305_write_reg(state, 0x030d, 0x00);
702 		lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_1, 0x4f);
703 		lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_2, 0x0c);
704 		lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_3, 0xac);
705 		lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_4, 0xba);
709 		lgdt3305_write_reg(state, 0x030d, 0x14);
769 	ret = lgdt3305_write_reg(state, LGDT3305_GEN_CONTROL, 0x2f);
1131 	ret = lgdt3305_write_reg(state, 0x0808, 0x80);
1137 	ret = lgdt3305_write_reg(state, 0x0808, 0x00);