Lines Matching refs:itd1000_write_reg
86 static inline int itd1000_write_reg(struct itd1000_state *state, u8 r, u8 v)
128 itd1000_write_reg(state, CON1, con1 | (1 << 1));
133 itd1000_write_reg(state, PLLFH, pllfh | (itd1000_lpf_pga[i].pgaext << 4));
134 itd1000_write_reg(state, BBGVMIN, bbgvmin | (itd1000_lpf_pga[i].bbgvmin));
135 itd1000_write_reg(state, BW, bw | (i & 0x0f));
139 itd1000_write_reg(state, CON1, con1 | (0 << 1));
171 itd1000_write_reg(state, GVBB_I2C, gvbb_i2c | (1 << 6));
175 itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | (itd1000_vcorg[i].vcorg << 4));
184 itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | ((itd1000_vcorg[i].vcorg + 1) << 4));
187 itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | ((itd1000_vcorg[i].vcorg - 1) << 4));
232 itd1000_write_reg(state, PLLNH, 0x80); /* PLLNH */
233 itd1000_write_reg(state, PLLNL, plln & 0xff);
234 itd1000_write_reg(state, PLLFH, (itd1000_read_reg(state, PLLFH) & 0xf0) | ((pllf >> 16) & 0x0f));
235 itd1000_write_reg(state, PLLFM, (pllf >> 8) & 0xff);
236 itd1000_write_reg(state, PLLFL, (pllf >> 0) & 0xff);
241 itd1000_write_reg(state, RFTR, itd1000_fre_values[i].values[0]);
243 itd1000_write_reg(state, RFST1+j, itd1000_fre_values[i].values[j+1]);
261 itd1000_write_reg(state, PLLCON1, pllcon1 | (1 << 7));
262 itd1000_write_reg(state, PLLCON1, pllcon1);
325 itd1000_write_reg(state, itd1000_init_tab[i][0], itd1000_init_tab[i][1]);
328 itd1000_write_reg(state, itd1000_reinit_tab[i][0], itd1000_reinit_tab[i][1]);