Lines Matching defs:cmdq
18 #include <linux/mailbox/mtk-cmdq-mailbox.h>
70 struct cmdq *cmdq;
77 struct cmdq {
96 static void cmdq_sw_ddr_enable(struct cmdq *cmdq, bool enable)
98 WARN_ON(clk_bulk_enable(cmdq->pdata->gce_num, cmdq->clocks));
101 writel(GCE_DDR_EN | GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE);
103 writel(GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE);
105 clk_bulk_disable(cmdq->pdata->gce_num, cmdq->clocks);
110 struct cmdq *cmdq = container_of(chan->mbox, struct cmdq, mbox);
112 return cmdq->pdata->shift;
116 static int cmdq_thread_suspend(struct cmdq *cmdq, struct cmdq_thread *thread)
128 dev_err(cmdq->mbox.dev, "suspend GCE thread 0x%x failed\n",
129 (u32)(thread->base - cmdq->base));
141 static void cmdq_init(struct cmdq *cmdq)
146 WARN_ON(clk_bulk_enable(cmdq->pdata->gce_num, cmdq->clocks));
147 if (cmdq->pdata->control_by_sw)
149 if (cmdq->pdata->sw_ddr_en)
153 writel(gctl_regval, cmdq->base + GCE_GCTL_VALUE);
155 writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES);
157 writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE);
158 clk_bulk_disable(cmdq->pdata->gce_num, cmdq->clocks);
161 static int cmdq_thread_reset(struct cmdq *cmdq, struct cmdq_thread *thread)
169 dev_err(cmdq->mbox.dev, "reset GCE thread 0x%x failed\n",
170 (u32)(thread->base - cmdq->base));
177 static void cmdq_thread_disable(struct cmdq *cmdq, struct cmdq_thread *thread)
179 cmdq_thread_reset(cmdq, thread);
192 struct device *dev = task->cmdq->mbox.dev;
203 (task->pa_base >> task->cmdq->pdata->shift);
230 struct cmdq *cmdq = task->cmdq;
232 dev_err(cmdq->mbox.dev, "task 0x%p error\n", task);
233 WARN_ON(cmdq_thread_suspend(cmdq, thread) < 0);
237 writel(next_task->pa_base >> cmdq->pdata->shift,
242 static void cmdq_thread_irq_handler(struct cmdq *cmdq,
268 curr_pa = readl(thread->base + CMDQ_THR_CURR_ADDR) << cmdq->pdata->shift;
290 cmdq_thread_disable(cmdq, thread);
295 struct cmdq *cmdq = dev;
299 irq_status = readl(cmdq->base + CMDQ_CURR_IRQ_STATUS) & cmdq->irq_mask;
300 if (!(irq_status ^ cmdq->irq_mask))
303 for_each_clear_bit(bit, &irq_status, cmdq->pdata->thread_nr) {
304 struct cmdq_thread *thread = &cmdq->thread[bit];
307 cmdq_thread_irq_handler(cmdq, thread);
311 pm_runtime_mark_last_busy(cmdq->mbox.dev);
318 struct cmdq *cmdq = dev_get_drvdata(dev);
320 return clk_bulk_enable(cmdq->pdata->gce_num, cmdq->clocks);
325 struct cmdq *cmdq = dev_get_drvdata(dev);
327 clk_bulk_disable(cmdq->pdata->gce_num, cmdq->clocks);
333 struct cmdq *cmdq = dev_get_drvdata(dev);
338 cmdq->suspended = true;
340 for (i = 0; i < cmdq->pdata->thread_nr; i++) {
341 thread = &cmdq->thread[i];
351 if (cmdq->pdata->sw_ddr_en)
352 cmdq_sw_ddr_enable(cmdq, false);
359 struct cmdq *cmdq = dev_get_drvdata(dev);
362 cmdq->suspended = false;
364 if (cmdq->pdata->sw_ddr_en)
365 cmdq_sw_ddr_enable(cmdq, true);
372 struct cmdq *cmdq = platform_get_drvdata(pdev);
374 if (cmdq->pdata->sw_ddr_en)
375 cmdq_sw_ddr_enable(cmdq, false);
380 clk_bulk_unprepare(cmdq->pdata->gce_num, cmdq->clocks);
387 struct cmdq *cmdq = dev_get_drvdata(chan->mbox->dev);
393 WARN_ON(cmdq->suspended);
395 ret = pm_runtime_get_sync(cmdq->mbox.dev);
401 pm_runtime_put_autosuspend(cmdq->mbox.dev);
405 task->cmdq = cmdq;
418 WARN_ON(cmdq_thread_reset(cmdq, thread) < 0);
420 writel(task->pa_base >> cmdq->pdata->shift,
422 writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->pdata->shift,
429 WARN_ON(cmdq_thread_suspend(cmdq, thread) < 0);
431 cmdq->pdata->shift;
433 cmdq->pdata->shift;
438 writel(task->pa_base >> cmdq->pdata->shift,
444 writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->pdata->shift,
450 pm_runtime_mark_last_busy(cmdq->mbox.dev);
451 pm_runtime_put_autosuspend(cmdq->mbox.dev);
464 struct cmdq *cmdq = dev_get_drvdata(chan->mbox->dev);
468 WARN_ON(pm_runtime_get_sync(cmdq->mbox.dev));
474 WARN_ON(cmdq_thread_suspend(cmdq, thread) < 0);
477 cmdq_thread_irq_handler(cmdq, thread);
487 cmdq_thread_disable(cmdq, thread);
498 pm_runtime_mark_last_busy(cmdq->mbox.dev);
499 pm_runtime_put_autosuspend(cmdq->mbox.dev);
506 struct cmdq *cmdq = dev_get_drvdata(chan->mbox->dev);
512 ret = pm_runtime_get_sync(cmdq->mbox.dev);
520 WARN_ON(cmdq_thread_suspend(cmdq, thread) < 0);
534 cmdq_thread_disable(cmdq, thread);
538 pm_runtime_mark_last_busy(cmdq->mbox.dev);
539 pm_runtime_put_autosuspend(cmdq->mbox.dev);
548 dev_err(cmdq->mbox.dev, "Fail to wait GCE thread 0x%x done\n",
549 (u32)(thread->base - cmdq->base));
553 pm_runtime_mark_last_busy(cmdq->mbox.dev);
554 pm_runtime_put_autosuspend(cmdq->mbox.dev);
584 struct cmdq *cmdq;
592 cmdq = devm_kzalloc(dev, sizeof(*cmdq), GFP_KERNEL);
593 if (!cmdq)
596 cmdq->base = devm_platform_ioremap_resource(pdev, 0);
597 if (IS_ERR(cmdq->base))
598 return PTR_ERR(cmdq->base);
600 cmdq->irq = platform_get_irq(pdev, 0);
601 if (cmdq->irq < 0)
602 return cmdq->irq;
604 cmdq->pdata = device_get_match_data(dev);
605 if (!cmdq->pdata) {
610 cmdq->irq_mask = GENMASK(cmdq->pdata->thread_nr - 1, 0);
612 dev_dbg(dev, "cmdq device: addr:0x%p, va:0x%p, irq:%d\n",
613 dev, cmdq->base, cmdq->irq);
615 if (cmdq->pdata->gce_num > 1) {
618 if (alias_id >= 0 && alias_id < cmdq->pdata->gce_num) {
619 cmdq->clocks[alias_id].id = clk_names[alias_id];
620 cmdq->clocks[alias_id].clk = of_clk_get(node, 0);
621 if (IS_ERR(cmdq->clocks[alias_id].clk)) {
624 PTR_ERR(cmdq->clocks[alias_id].clk),
631 cmdq->clocks[alias_id].id = clk_name;
632 cmdq->clocks[alias_id].clk = devm_clk_get(&pdev->dev, clk_name);
633 if (IS_ERR(cmdq->clocks[alias_id].clk)) {
634 return dev_err_probe(dev, PTR_ERR(cmdq->clocks[alias_id].clk),
639 cmdq->mbox.dev = dev;
640 cmdq->mbox.chans = devm_kcalloc(dev, cmdq->pdata->thread_nr,
641 sizeof(*cmdq->mbox.chans), GFP_KERNEL);
642 if (!cmdq->mbox.chans)
645 cmdq->mbox.num_chans = cmdq->pdata->thread_nr;
646 cmdq->mbox.ops = &cmdq_mbox_chan_ops;
647 cmdq->mbox.of_xlate = cmdq_xlate;
650 cmdq->mbox.txdone_irq = false;
651 cmdq->mbox.txdone_poll = false;
653 cmdq->thread = devm_kcalloc(dev, cmdq->pdata->thread_nr,
654 sizeof(*cmdq->thread), GFP_KERNEL);
655 if (!cmdq->thread)
658 for (i = 0; i < cmdq->pdata->thread_nr; i++) {
659 cmdq->thread[i].base = cmdq->base + CMDQ_THR_BASE +
661 INIT_LIST_HEAD(&cmdq->thread[i].task_busy_list);
662 cmdq->mbox.chans[i].con_priv = (void *)&cmdq->thread[i];
665 err = devm_mbox_controller_register(dev, &cmdq->mbox);
671 platform_set_drvdata(pdev, cmdq);
673 WARN_ON(clk_bulk_prepare(cmdq->pdata->gce_num, cmdq->clocks));
675 cmdq_init(cmdq);
677 err = devm_request_irq(dev, cmdq->irq, cmdq_irq_handler, IRQF_SHARED,
678 "mtk_cmdq", cmdq);