drivers/mailbox/imx-mailbox.c

115 	int (*tx)(struct imx_mu_priv *priv, struct imx_mu_con_priv *cp, void *data);
116 	int (*rx)(struct imx_mu_priv *priv, struct imx_mu_con_priv *cp);
117 	int (*rxdb)(struct imx_mu_priv *priv, struct imx_mu_con_priv *cp);
223 			     struct imx_mu_con_priv *cp,
228 	switch (cp->type) {
230 		imx_mu_write(priv, *arg, priv->dcfg->xTR + cp->idx * 4);
231 		imx_mu_xcr_rmw(priv, IMX_MU_TCR, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx), 0);
234 		imx_mu_xcr_rmw(priv, IMX_MU_GCR, IMX_MU_xCR_GIRn(priv->dcfg->type, cp->idx), 0);
235 		tasklet_schedule(&cp->txdb_tasklet);
238 		imx_mu_xcr_rmw(priv, IMX_MU_GCR, IMX_MU_xCR_GIRn(priv->dcfg->type, cp->idx), 0);
241 		dev_warn_ratelimited(priv->dev, "Send data on wrong channel type: %d\n", cp->type);
249 			     struct imx_mu_con_priv *cp)
253 	dat = imx_mu_read(priv, priv->dcfg->xRR + (cp->idx) * 4);
254 	mbox_chan_received_data(cp->chan, (void *)&dat);
260 			       struct imx_mu_con_priv *cp)
262 	imx_mu_write(priv, IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx),
264 	mbox_chan_received_data(cp->chan, NULL);
269 static int imx_mu_specific_tx(struct imx_mu_priv *priv, struct imx_mu_con_priv *cp, void *data)
285 	switch (cp->type) {
315 		imx_mu_xcr_rmw(priv, IMX_MU_TCR, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx), 0);
318 		dev_warn_ratelimited(priv->dev, "Send data on wrong channel type: %d\n", cp->type);
325 static int imx_mu_specific_rx(struct imx_mu_priv *priv, struct imx_mu_con_priv *cp)
363 	mbox_chan_received_data(cp->chan, (void *)priv->msg);
368 static int imx_mu_seco_tx(struct imx_mu_priv *priv, struct imx_mu_con_priv *cp,
379 	switch (cp->type) {
403 			       IMX_MU_xCR_GIRn(priv->dcfg->type, cp->idx), 0);
423 		tasklet_schedule(&cp->txdb_tasklet);
429 				     cp->type);
436 static int imx_mu_seco_rxdb(struct imx_mu_priv *priv, struct imx_mu_con_priv *cp)
468 	imx_mu_write(priv, IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx),
476 	mbox_chan_received_data(cp->chan, (void *)&msg);
481 	mbox_chan_received_data(cp->chan, ERR_PTR(err));
489 	struct imx_mu_con_priv *cp = (struct imx_mu_con_priv *)data;
491 	mbox_chan_txdone(cp->chan, 0);
498 	struct imx_mu_con_priv *cp = chan->con_priv;
501 	switch (cp->type) {
505 		val &= IMX_MU_xSR_TEn(priv->dcfg->type, cp->idx) &
506 			(ctrl & IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx));
511 		val &= IMX_MU_xSR_RFn(priv->dcfg->type, cp->idx) &
512 			(ctrl & IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx));
517 		val &= IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx) &
518 			(ctrl & IMX_MU_xCR_GIEn(priv->dcfg->type, cp->idx));
524 				     cp->type);
531 	if ((val == IMX_MU_xSR_TEn(priv->dcfg->type, cp->idx)) &&
532 	    (cp->type == IMX_MU_TYPE_TX)) {
533 		imx_mu_xcr_rmw(priv, IMX_MU_TCR, 0, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx));
535 	} else if ((val == IMX_MU_xSR_RFn(priv->dcfg->type, cp->idx)) &&
536 		   (cp->type == IMX_MU_TYPE_RX)) {
537 		priv->dcfg->rx(priv, cp);
538 	} else if ((val == IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx)) &&
539 		   (cp->type == IMX_MU_TYPE_RXDB)) {
540 		priv->dcfg->rxdb(priv, cp);
555 	struct imx_mu_con_priv *cp = chan->con_priv;
557 	return priv->dcfg->tx(priv, cp, data);
563 	struct imx_mu_con_priv *cp = chan->con_priv;
568 	if (cp->type == IMX_MU_TYPE_TXDB_V2)
571 	if (cp->type == IMX_MU_TYPE_TXDB) {
573 		tasklet_init(&cp->txdb_tasklet, imx_mu_txdb_tasklet,
574 			     (unsigned long)cp);
585 	ret = request_irq(priv->irq[cp->type], imx_mu_isr, irq_flag, cp->irq_desc, chan);
587 		dev_err(priv->dev, "Unable to acquire IRQ %d\n", priv->irq[cp->type]);
591 	switch (cp->type) {
593 		imx_mu_xcr_rmw(priv, IMX_MU_RCR, IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx), 0);
596 		imx_mu_xcr_rmw(priv, IMX_MU_GIER, IMX_MU_xCR_GIEn(priv->dcfg->type, cp->idx), 0);
608 	struct imx_mu_con_priv *cp = chan->con_priv;
612 	if (cp->type == IMX_MU_TYPE_TXDB_V2) {
617 	if (cp->type == IMX_MU_TYPE_TXDB) {
618 		tasklet_kill(&cp->txdb_tasklet);
623 	switch (cp->type) {
625 		imx_mu_xcr_rmw(priv, IMX_MU_TCR, 0, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx));
628 		imx_mu_xcr_rmw(priv, IMX_MU_RCR, 0, IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx));
631 		imx_mu_xcr_rmw(priv, IMX_MU_GIER, 0, IMX_MU_xCR_GIEn(priv->dcfg->type, cp->idx));
644 	free_irq(priv->irq[cp->type], chan);
770 		struct imx_mu_con_priv *cp = &priv->con_priv[i];
772 		cp->idx = i % 4;
773 		cp->type = i >> 2;
774 		cp->chan = &priv->mbox_chans[i];
775 		priv->mbox_chans[i].con_priv = cp;
776 		snprintf(cp->irq_desc, sizeof(cp->irq_desc),
777 			 "imx_mu_chan[%i-%i]", cp->type, cp->idx);
807 		struct imx_mu_con_priv *cp = &priv->con_priv[i];
809 		cp->idx = i < 2 ? 0 : i - 2;
810 		cp->type = i < 2 ? i : IMX_MU_TYPE_RXDB;
811 		cp->chan = &priv->mbox_chans[i];
812 		priv->mbox_chans[i].con_priv = cp;
813 		snprintf(cp->irq_desc, sizeof(cp->irq_desc),
814 			 "imx_mu_chan[%i-%i]", cp->type, cp->idx);