Lines Matching refs:hdlc
40 void isdnhdlc_rcv_init(struct isdnhdlc_vars *hdlc, u32 features)
42 memset(hdlc, 0, sizeof(struct isdnhdlc_vars));
43 hdlc->state = HDLC_GET_DATA;
45 hdlc->do_adapt56 = 1;
47 hdlc->do_bitreverse = 1;
51 void isdnhdlc_out_init(struct isdnhdlc_vars *hdlc, u32 features)
53 memset(hdlc, 0, sizeof(struct isdnhdlc_vars));
55 hdlc->dchannel = 1;
56 hdlc->state = HDLC_SEND_FIRST_FLAG;
58 hdlc->dchannel = 0;
59 hdlc->state = HDLC_SEND_FAST_FLAG;
60 hdlc->ffvalue = 0x7e;
62 hdlc->cbin = 0x7e;
64 hdlc->do_adapt56 = 1;
65 hdlc->state = HDLC_SENDFLAG_B0;
67 hdlc->data_bits = 8;
69 hdlc->do_bitreverse = 1;
74 check_frame(struct isdnhdlc_vars *hdlc)
78 if (hdlc->dstpos < 2) /* too small - framing error */
80 else if (hdlc->crc != 0xf0b8) /* crc error */
84 hdlc->dstpos -= 2;
86 status = hdlc->dstpos;
118 int isdnhdlc_decode(struct isdnhdlc_vars *hdlc, const u8 *src, int slen,
162 if (hdlc->bit_shift == 0) {
164 if (hdlc->do_bitreverse == 0)
165 hdlc->cbin = bitrev8(*src++);
167 hdlc->cbin = *src++;
169 hdlc->bit_shift = 8;
170 if (hdlc->do_adapt56)
171 hdlc->bit_shift--;
174 switch (hdlc->state) {
178 if (hdlc->cbin == 0xff) {
179 hdlc->bit_shift = 0;
182 hdlc->state = HDLC_GET_FLAG_B0;
183 hdlc->hdlc_bits1 = 0;
184 hdlc->bit_shift = 8;
187 if (!(hdlc->cbin & 0x80)) {
188 hdlc->state = HDLC_GETFLAG_B1A6;
189 hdlc->hdlc_bits1 = 0;
191 if ((!hdlc->do_adapt56) &&
192 (++hdlc->hdlc_bits1 >= 8) &&
193 (hdlc->bit_shift == 1))
194 hdlc->state = HDLC_FAST_IDLE;
196 hdlc->cbin <<= 1;
197 hdlc->bit_shift--;
200 if (hdlc->cbin & 0x80) {
201 hdlc->hdlc_bits1++;
202 if (hdlc->hdlc_bits1 == 6)
203 hdlc->state = HDLC_GETFLAG_B7;
205 hdlc->hdlc_bits1 = 0;
206 hdlc->cbin <<= 1;
207 hdlc->bit_shift--;
210 if (hdlc->cbin & 0x80) {
211 hdlc->state = HDLC_GET_FLAG_B0;
213 hdlc->state = HDLC_GET_DATA;
214 hdlc->crc = 0xffff;
215 hdlc->shift_reg = 0;
216 hdlc->hdlc_bits1 = 0;
217 hdlc->data_bits = 0;
218 hdlc->data_received = 0;
220 hdlc->cbin <<= 1;
221 hdlc->bit_shift--;
224 if (hdlc->cbin & 0x80) {
225 hdlc->hdlc_bits1++;
226 switch (hdlc->hdlc_bits1) {
230 if (hdlc->data_received)
233 if (!hdlc->do_adapt56) {
234 if (hdlc->cbin == fast_abort
235 [hdlc->bit_shift + 1]) {
236 hdlc->state =
238 hdlc->bit_shift = 1;
242 hdlc->state = HDLC_GET_FLAG_B0;
245 hdlc->shift_reg >>= 1;
246 hdlc->shift_reg |= 0x80;
247 hdlc->data_bits++;
251 switch (hdlc->hdlc_bits1) {
255 if (hdlc->data_received)
256 status = check_frame(hdlc);
257 hdlc->crc = 0xffff;
258 hdlc->shift_reg = 0;
259 hdlc->data_bits = 0;
260 if (!hdlc->do_adapt56)
261 handle_fast_flag(hdlc);
263 hdlc->state = HDLC_GET_DATA;
264 hdlc->data_received = 0;
268 hdlc->shift_reg >>= 1;
269 hdlc->data_bits++;
272 hdlc->hdlc_bits1 = 0;
275 hdlc->dstpos = 0;
277 hdlc->cbin <<= 1;
278 hdlc->bit_shift--;
281 if (hdlc->data_bits == 8) {
282 hdlc->data_bits = 0;
283 hdlc->data_received = 1;
284 hdlc->crc = crc_ccitt_byte(hdlc->crc,
285 hdlc->shift_reg);
288 if (hdlc->dstpos < dsize)
289 dst[hdlc->dstpos++] = hdlc->shift_reg;
293 hdlc->dstpos = 0;
296 hdlc->cbin <<= 1;
297 hdlc->bit_shift--;
300 if (hdlc->cbin == hdlc->ffvalue) {
301 hdlc->bit_shift = 0;
304 if (hdlc->cbin == 0xff) {
305 hdlc->state = HDLC_FAST_IDLE;
306 hdlc->bit_shift = 0;
307 } else if (hdlc->ffbit_shift == 8) {
308 hdlc->state = HDLC_GETFLAG_B7;
311 handle_abort(hdlc);
341 int isdnhdlc_encode(struct isdnhdlc_vars *hdlc, const u8 *src, u16 slen,
353 if ((slen == 1) && (hdlc->state == HDLC_SEND_FAST_FLAG))
354 hdlc->state = HDLC_SENDFLAG_ONE;
356 if (hdlc->bit_shift == 0) {
357 if (slen && !hdlc->do_closing) {
358 hdlc->shift_reg = *src++;
362 hdlc->do_closing = 1;
363 hdlc->bit_shift = 8;
365 if (hdlc->state == HDLC_SEND_DATA) {
366 if (hdlc->data_received) {
367 hdlc->state = HDLC_SEND_CRC1;
368 hdlc->crc ^= 0xffff;
369 hdlc->bit_shift = 8;
370 hdlc->shift_reg =
371 hdlc->crc & 0xff;
372 } else if (!hdlc->do_adapt56)
373 hdlc->state =
376 hdlc->state =
383 switch (hdlc->state) {
389 hdlc->do_closing = 0;
392 if (hdlc->do_bitreverse == 0)
393 *dst++ = bitrev8(hdlc->ffvalue);
395 *dst++ = hdlc->ffvalue;
402 if (hdlc->bit_shift == 8) {
403 hdlc->cbin = hdlc->ffvalue >>
404 (8 - hdlc->data_bits);
405 hdlc->state = HDLC_SEND_DATA;
406 hdlc->crc = 0xffff;
407 hdlc->hdlc_bits1 = 0;
408 hdlc->data_received = 1;
412 hdlc->do_closing = 0;
413 hdlc->cbin <<= 1;
414 hdlc->data_bits++;
415 hdlc->hdlc_bits1 = 0;
416 hdlc->state = HDLC_SENDFLAG_B1A6;
419 hdlc->cbin <<= 1;
420 hdlc->data_bits++;
421 hdlc->cbin++;
422 if (++hdlc->hdlc_bits1 == 6)
423 hdlc->state = HDLC_SENDFLAG_B7;
426 hdlc->cbin <<= 1;
427 hdlc->data_bits++;
429 hdlc->state = HDLC_SENDFLAG_B0;
432 if (hdlc->bit_shift == 8) {
433 hdlc->state = HDLC_SEND_DATA;
434 hdlc->crc = 0xffff;
435 hdlc->hdlc_bits1 = 0;
436 hdlc->data_received = 1;
440 hdlc->data_received = 1;
441 if (hdlc->data_bits == 8) {
442 hdlc->state = HDLC_SEND_DATA;
443 hdlc->crc = 0xffff;
444 hdlc->hdlc_bits1 = 0;
447 hdlc->cbin <<= 1;
448 hdlc->data_bits++;
449 if (hdlc->shift_reg & 0x01)
450 hdlc->cbin++;
451 hdlc->shift_reg >>= 1;
452 hdlc->bit_shift--;
453 if (hdlc->bit_shift == 0) {
454 hdlc->state = HDLC_SEND_DATA;
455 hdlc->crc = 0xffff;
456 hdlc->hdlc_bits1 = 0;
460 hdlc->cbin <<= 1;
461 hdlc->data_bits++;
462 if (hdlc->hdlc_bits1 == 5) {
463 hdlc->hdlc_bits1 = 0;
466 if (hdlc->bit_shift == 8)
467 hdlc->crc = crc_ccitt_byte(hdlc->crc,
468 hdlc->shift_reg);
469 if (hdlc->shift_reg & 0x01) {
470 hdlc->hdlc_bits1++;
471 hdlc->cbin++;
472 hdlc->shift_reg >>= 1;
473 hdlc->bit_shift--;
475 hdlc->hdlc_bits1 = 0;
476 hdlc->shift_reg >>= 1;
477 hdlc->bit_shift--;
481 hdlc->cbin <<= 1;
482 hdlc->data_bits++;
483 if (hdlc->hdlc_bits1 == 5) {
484 hdlc->hdlc_bits1 = 0;
487 if (hdlc->shift_reg & 0x01) {
488 hdlc->hdlc_bits1++;
489 hdlc->cbin++;
490 hdlc->shift_reg >>= 1;
491 hdlc->bit_shift--;
493 hdlc->hdlc_bits1 = 0;
494 hdlc->shift_reg >>= 1;
495 hdlc->bit_shift--;
497 if (hdlc->bit_shift == 0) {
498 hdlc->shift_reg = (hdlc->crc >> 8);
499 hdlc->state = HDLC_SEND_CRC2;
500 hdlc->bit_shift = 8;
504 hdlc->cbin <<= 1;
505 hdlc->data_bits++;
506 if (hdlc->hdlc_bits1 == 5) {
507 hdlc->hdlc_bits1 = 0;
510 if (hdlc->shift_reg & 0x01) {
511 hdlc->hdlc_bits1++;
512 hdlc->cbin++;
513 hdlc->shift_reg >>= 1;
514 hdlc->bit_shift--;
516 hdlc->hdlc_bits1 = 0;
517 hdlc->shift_reg >>= 1;
518 hdlc->bit_shift--;
520 if (hdlc->bit_shift == 0) {
521 hdlc->shift_reg = 0x7e;
522 hdlc->state = HDLC_SEND_CLOSING_FLAG;
523 hdlc->bit_shift = 8;
527 hdlc->cbin <<= 1;
528 hdlc->data_bits++;
529 if (hdlc->hdlc_bits1 == 5) {
530 hdlc->hdlc_bits1 = 0;
533 if (hdlc->shift_reg & 0x01)
534 hdlc->cbin++;
535 hdlc->shift_reg >>= 1;
536 hdlc->bit_shift--;
537 if (hdlc->bit_shift == 0) {
538 hdlc->ffvalue =
539 xfast_flag_value[hdlc->data_bits];
540 if (hdlc->dchannel) {
541 hdlc->ffvalue = 0x7e;
542 hdlc->state = HDLC_SEND_IDLE1;
543 hdlc->bit_shift = 8-hdlc->data_bits;
544 if (hdlc->bit_shift == 0)
545 hdlc->state =
548 if (!hdlc->do_adapt56) {
549 hdlc->state =
551 hdlc->data_received = 0;
553 hdlc->state = HDLC_SENDFLAG_B0;
554 hdlc->data_received = 0;
563 hdlc->do_closing = 0;
564 hdlc->cbin <<= 1;
565 hdlc->cbin++;
566 hdlc->data_bits++;
567 hdlc->bit_shift--;
568 if (hdlc->bit_shift == 0) {
569 hdlc->state = HDLC_SEND_FAST_IDLE;
570 hdlc->bit_shift = 0;
574 hdlc->do_closing = 0;
575 hdlc->cbin = 0xff;
576 hdlc->data_bits = 8;
577 if (hdlc->bit_shift == 8) {
578 hdlc->cbin = 0x7e;
579 hdlc->state = HDLC_SEND_FIRST_FLAG;
582 if (hdlc->do_bitreverse == 0)
583 *dst++ = bitrev8(hdlc->cbin);
585 *dst++ = hdlc->cbin;
586 hdlc->bit_shift = 0;
587 hdlc->data_bits = 0;
595 if (hdlc->do_adapt56) {
596 if (hdlc->data_bits == 7) {
597 hdlc->cbin <<= 1;
598 hdlc->cbin++;
599 hdlc->data_bits++;
602 if (hdlc->data_bits == 8) {
604 if (hdlc->do_bitreverse == 0)
605 *dst++ = bitrev8(hdlc->cbin);
607 *dst++ = hdlc->cbin;
608 hdlc->data_bits = 0;