drivers/irqchip/irq-sifive-plic.c

104 static void plic_toggle(struct plic_handler *handler, int hwirq, int enable)
108 	raw_spin_lock_irqsave(&handler->enable_lock, flags);
109 	__plic_toggle(handler->enable_base, hwirq, enable);
110 	raw_spin_unlock_irqrestore(&handler->enable_lock, flags);
119 		struct plic_handler *handler = per_cpu_ptr(&plic_handlers, cpu);
121 		plic_toggle(handler, d->hwirq, enable);
151 	struct plic_handler *handler = this_cpu_ptr(&plic_handlers);
154 		plic_toggle(handler, d->hwirq, 1);
155 		writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM);
156 		plic_toggle(handler, d->hwirq, 0);
158 		writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM);
260 		struct plic_handler *handler = per_cpu_ptr(&plic_handlers, cpu);
262 		if (!handler->present)
265 		raw_spin_lock_irqsave(&handler->enable_lock, flags);
267 			reg = handler->enable_base + i * sizeof(u32);
268 			handler->enable_save[i] = readl(reg);
270 		raw_spin_unlock_irqrestore(&handler->enable_lock, flags);
292 		struct plic_handler *handler = per_cpu_ptr(&plic_handlers, cpu);
294 		if (!handler->present)
297 		raw_spin_lock_irqsave(&handler->enable_lock, flags);
299 			reg = handler->enable_base + i * sizeof(u32);
300 			writel(handler->enable_save[i], reg);
302 		raw_spin_unlock_irqrestore(&handler->enable_lock, flags);
371 	struct plic_handler *handler = this_cpu_ptr(&plic_handlers);
373 	void __iomem *claim = handler->hart_base + CONTEXT_CLAIM;
376 	WARN_ON_ONCE(!handler->present);
381 		int err = generic_handle_domain_irq(handler->priv->irqdomain,
384 			dev_warn_ratelimited(handler->priv->dev,
392 static void plic_set_threshold(struct plic_handler *handler, u32 threshold)
395 	writel(threshold, handler->hart_base + CONTEXT_THRESHOLD);
408 	struct plic_handler *handler = this_cpu_ptr(&plic_handlers);
414 		dev_warn(handler->priv->dev, "cpu%d: parent irq not available\n", cpu);
415 	plic_set_threshold(handler, PLIC_ENABLE_THRESHOLD);
491 	struct plic_handler *handler;
555 		/* Find parent domain and register chained handler */
564 		 * When running in M-mode we need to ignore the S-mode handler.
568 		handler = per_cpu_ptr(&plic_handlers, cpu);
569 		if (handler->present) {
570 			dev_warn(dev, "handler already present for context %d.\n", i);
571 			plic_set_threshold(handler, PLIC_DISABLE_THRESHOLD);
576 		handler->present = true;
577 		handler->hart_base = priv->regs + CONTEXT_BASE +
579 		raw_spin_lock_init(&handler->enable_lock);
580 		handler->enable_base = priv->regs + CONTEXT_ENABLE_BASE +
582 		handler->priv = priv;
584 		handler->enable_save = devm_kcalloc(dev, DIV_ROUND_UP(nr_irqs, 32),
585 						    sizeof(*handler->enable_save), GFP_KERNEL);
586 		if (!handler->enable_save)
590 			plic_toggle(handler, hwirq, 0);
610 			handler = per_cpu_ptr(&plic_handlers, cpu);
611 			if (!handler->present) {
636 		handler = per_cpu_ptr(&plic_handlers, cpu);
637 		handler->present = false;
638 		handler->hart_base = NULL;
639 		handler->enable_base = NULL;
640 		handler->enable_save = NULL;
641 		handler->priv = NULL;