drivers/irqchip/irq-sifive-plic.c

104 static void plic_toggle(struct plic_handler *handler, int hwirq, int enable)
108 	raw_spin_lock_irqsave(&handler->enable_lock, flags);
109 	__plic_toggle(handler->enable_base, hwirq, enable);
110 	raw_spin_unlock_irqrestore(&handler->enable_lock, flags);
119 		struct plic_handler *handler = per_cpu_ptr(&plic_handlers, cpu);
121 		plic_toggle(handler, d->hwirq, enable);
151 	struct plic_handler *handler = this_cpu_ptr(&plic_handlers);
154 		plic_toggle(handler, d->hwirq, 1);
155 		writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM);
156 		plic_toggle(handler, d->hwirq, 0);
158 		writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM);
257 		struct plic_handler *handler = per_cpu_ptr(&plic_handlers, cpu);
259 		if (!handler->present)
262 		raw_spin_lock_irqsave(&handler->enable_lock, flags);
264 			reg = handler->enable_base + i * sizeof(u32);
265 			handler->enable_save[i] = readl(reg);
267 		raw_spin_unlock_irqrestore(&handler->enable_lock, flags);
289 		struct plic_handler *handler = per_cpu_ptr(&plic_handlers, cpu);
291 		if (!handler->present)
294 		raw_spin_lock_irqsave(&handler->enable_lock, flags);
296 			reg = handler->enable_base + i * sizeof(u32);
297 			writel(handler->enable_save[i], reg);
299 		raw_spin_unlock_irqrestore(&handler->enable_lock, flags);
368 	struct plic_handler *handler = this_cpu_ptr(&plic_handlers);
370 	void __iomem *claim = handler->hart_base + CONTEXT_CLAIM;
373 	WARN_ON_ONCE(!handler->present);
378 		int err = generic_handle_domain_irq(handler->priv->irqdomain,
381 			dev_warn_ratelimited(handler->priv->dev,
389 static void plic_set_threshold(struct plic_handler *handler, u32 threshold)
392 	writel(threshold, handler->hart_base + CONTEXT_THRESHOLD);
405 	struct plic_handler *handler = this_cpu_ptr(&plic_handlers);
411 		dev_warn(handler->priv->dev, "cpu%d: parent irq not available\n", cpu);
412 	plic_set_threshold(handler, PLIC_ENABLE_THRESHOLD);
488 	struct plic_handler *handler;
552 		/* Find parent domain and register chained handler */
561 		 * When running in M-mode we need to ignore the S-mode handler.
565 		handler = per_cpu_ptr(&plic_handlers, cpu);
566 		if (handler->present) {
567 			dev_warn(dev, "handler already present for context %d.\n", i);
568 			plic_set_threshold(handler, PLIC_DISABLE_THRESHOLD);
573 		handler->present = true;
574 		handler->hart_base = priv->regs + CONTEXT_BASE +
576 		raw_spin_lock_init(&handler->enable_lock);
577 		handler->enable_base = priv->regs + CONTEXT_ENABLE_BASE +
579 		handler->priv = priv;
581 		handler->enable_save = devm_kcalloc(dev, DIV_ROUND_UP(nr_irqs, 32),
582 						    sizeof(*handler->enable_save), GFP_KERNEL);
583 		if (!handler->enable_save)
587 			plic_toggle(handler, hwirq, 0);
607 			handler = per_cpu_ptr(&plic_handlers, cpu);
608 			if (!handler->present) {
633 		handler = per_cpu_ptr(&plic_handlers, cpu);
634 		handler->present = false;
635 		handler->hart_base = NULL;
636 		handler->enable_base = NULL;
637 		handler->enable_save = NULL;
638 		handler->priv = NULL;