drivers/irqchip/irq-mchp-eic.c

32  * @irqs: irqs b/w eic and gic
45 static struct mchp_eic *eic;
51 	tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq));
53 	writel_relaxed(tmp, eic->base + MCHP_EIC_SCFG(d->hwirq));
62 	tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq));
64 	writel_relaxed(tmp, eic->base + MCHP_EIC_SCFG(d->hwirq));
74 	tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq));
96 	writel_relaxed(tmp, eic->base + MCHP_EIC_SCFG(d->hwirq));
103 	irq_set_irq_wake(eic->irqs[d->hwirq], on);
105 		eic->wakeup_source |= BIT(d->hwirq);
107 		eic->wakeup_source &= ~BIT(d->hwirq);
117 		eic->scfg[hwirq] = readl_relaxed(eic->base +
120 	if (!eic->wakeup_source)
121 		clk_disable_unprepare(eic->clk);
130 	if (!eic->wakeup_source)
131 		clk_prepare_enable(eic->clk);
134 		writel_relaxed(eic->scfg[hwirq], eic->base +
144 	.name		= "eic",
185 	irq_domain_set_hwirq_and_chip(domain, virq, hwirq, &mchp_eic_chip, eic);
190 	parent_fwspec.param[1] = eic->irqs[hwirq];
207 	eic = kzalloc(sizeof(*eic), GFP_KERNEL);
208 	if (!eic)
211 	eic->base = of_iomap(node, 0);
212 	if (!eic->base) {
223 	eic->clk = of_clk_get_by_name(node, "pclk");
224 	if (IS_ERR(eic->clk)) {
225 		ret = PTR_ERR(eic->clk);
229 	ret = clk_prepare_enable(eic->clk);
237 		writel_relaxed(0UL, eic->base + MCHP_EIC_SCFG(i));
248 		eic->irqs[i] = irq.args[1];
251 	eic->domain = irq_domain_add_hierarchy(parent_domain, 0, MCHP_EIC_NIRQ,
252 					       node, &mchp_eic_domain_ops, eic);
253 	if (!eic->domain) {
266 	clk_disable_unprepare(eic->clk);
268 	iounmap(eic->base);
270 	kfree(eic);
275 IRQCHIP_MATCH("microchip,sama7g5-eic", mchp_eic_init)