Lines Matching defs:which
122 * If both are true (which is when gic_nonsecure_priorities gets enabled),
426 enum irqchip_irq_state which, bool val)
433 switch (which) {
459 enum irqchip_irq_state which, bool *val)
464 switch (which) {
731 * It is possible for the IAR to report an IRQ which was signalled *after*
736 * For devices which are tightly coupled to the CPU, such as PMUs, a
826 * An exception has been taken from a context with IRQs disabled, which can only
1554 /* Prevents SW retriggers which mess up the ACK/EOI ordering */
2026 * architecture spec (which says that reserved registers are RES0).