drivers/irqchip/irq-gic-v3-its.c

157  * translation table, and a list of interrupts.  If it some of its
1885 		 * start poking the virtual property table.
1889 		/* Write out the property to the prop table */
2296 	pr_info("GICv3: using LPI property table @%pa\n",
2452 		 * Find out whether hw supports a single or two-level table by
2453 		 * table by reading bit at offset '62' after writing '1' to it.
2460 			 * The size of the lvl2 table is equal to ITS page size
2461 			 * which is 'psz'. For computing lvl1 table size,
2462 			 * subtract ID bits that sparse lvl2 table from 'ids'
2463 			 * which is reported by ITS hardware times lvl1 table
2475 	 * massive waste of memory if two-level device table
2540 		/* GICv4.1 guarantees that the vPE table is GITS_BASER2 */
2702 		/* GICv4.1 guarantees that the vPE table is GITS_BASER2 */
2781 	__le64 *table;
2811 	/* Don't allow vpe_id that exceeds single, flat table limit */
2815 	/* Compute 1st level table index & check if that exceeds table limit */
2820 	table = gic_data_rdist_cpu(cpu)->vpe_l1_base;
2822 	/* Allocate memory for 2nd level table */
2823 	if (!table[idx]) {
2828 		/* Flush Lvl2 table to PoC if hw doesn't support coherency */
2832 		table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID);
2836 			gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE);
2838 		/* Ensure updated table contents are visible to RD hardware */
2919 	 * If we need more than just a single L1 page, flag the table
3014 	/* Check whether the property table is in a reserved region */
3078 		pr_err_ratelimited("ITS virtual pending table not cleaning\n");
3115 		 * Check that we get the same property table on all
3159 		pr_info_once("GIC: using cache flushing for LPI property table\n");
3227 	pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n",
3321 	__le64 *table;
3323 	/* Don't allow device id that exceeds single, flat table limit */
3328 	/* Compute 1st level table index & check if that exceeds table limit */
3333 	table = baser->base;
3335 	/* Allocate memory for 2nd level table */
3336 	if (!table[idx]) {
3342 		/* Flush Lvl2 table to PoC if hw doesn't support coherency */
3346 		table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID);
3350 			gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE);
3352 		/* Ensure updated table contents are visible to ITS hardware */
3404 	 * the L1 table on *all* v4.1 RDs.
3915 	 * There is no good way of finding out if the pending table is
3919 	 * that the pending table is empty. A good implementation
4680 	/* erratum 22375: only alloc 8MB table size (20 bits) */
5318 	 * If the pending table was pre-programmed, free the memory we