Lines Matching refs:reg_base
34 static void __iomem *reg_base;
60 static void __init ck_set_gc(struct device_node *node, void __iomem *reg_base,
66 gc->reg_base = reg_base;
111 reg_base = of_iomap(node, 0);
112 if (!reg_base) {
153 readl(reg_base + GX_INTC_PEN63_32), 32);
158 readl(reg_base + GX_INTC_PEN31_00), 0);
175 writel(0x0, reg_base + GX_INTC_NEN31_00);
176 writel(0x0, reg_base + GX_INTC_NEN63_32);
181 writel(0x0, reg_base + GX_INTC_NMASK31_00);
182 writel(0x0, reg_base + GX_INTC_NMASK63_32);
184 setup_irq_channel(0x03020100, reg_base + GX_INTC_SOURCE);
186 ck_set_gc(node, reg_base, GX_INTC_NEN31_00, 0);
187 ck_set_gc(node, reg_base, GX_INTC_NEN63_32, 32);
202 void __iomem *reg_pen_lo = reg_base + CK_INTC_PEN31_00;
203 void __iomem *reg_pen_hi = reg_base + CK_INTC_PEN63_32;
240 writel(0, reg_base + CK_INTC_NEN31_00);
241 writel(0, reg_base + CK_INTC_NEN63_32);
244 writel(BIT(31), reg_base + CK_INTC_ICR);
246 ck_set_gc(node, reg_base, CK_INTC_NEN31_00, 0);
247 ck_set_gc(node, reg_base, CK_INTC_NEN63_32, 32);
249 setup_irq_channel(0x00010203, reg_base + CK_INTC_SOURCE);
270 writel(0, reg_base + CK_INTC_NEN31_00 + CK_INTC_DUAL_BASE);
271 writel(0, reg_base + CK_INTC_NEN63_32 + CK_INTC_DUAL_BASE);
273 ck_set_gc(node, reg_base + CK_INTC_DUAL_BASE, CK_INTC_NEN31_00, 64);
274 ck_set_gc(node, reg_base + CK_INTC_DUAL_BASE, CK_INTC_NEN63_32, 96);
277 reg_base + CK_INTC_SOURCE + CK_INTC_DUAL_BASE);