drivers/iommu/mtk_iommu_v1.c

133 static struct mtk_iommu_v1_domain *to_mtk_domain(struct iommu_domain *dom)
135 	return container_of(dom, struct mtk_iommu_v1_domain, domain);
197 	struct mtk_iommu_v1_domain *dom = data->m4u_dom;
215 	if (report_iommu_fault(&dom->domain, data->dev, fault_iova,
257 	struct mtk_iommu_v1_domain *dom = data->m4u_dom;
259 	spin_lock_init(&dom->pgtlock);
261 	dom->pgt_va = dma_alloc_coherent(data->dev, M2701_IOMMU_PGT_SIZE,
262 					 &dom->pgt_pa, GFP_KERNEL);
263 	if (!dom->pgt_va)
266 	writel(dom->pgt_pa, data->base + REG_MMU_PT_BASE_ADDR);
268 	dom->data = data;
275 	struct mtk_iommu_v1_domain *dom;
277 	dom = kzalloc(sizeof(*dom), GFP_KERNEL);
278 	if (!dom)
281 	return &dom->domain;
286 	struct mtk_iommu_v1_domain *dom = to_mtk_domain(domain);
287 	struct mtk_iommu_v1_data *data = dom->data;
290 			dom->pgt_va, dom->pgt_pa);
297 	struct mtk_iommu_v1_domain *dom = to_mtk_domain(domain);
307 		data->m4u_dom = dom;
341 	struct mtk_iommu_v1_domain *dom = to_mtk_domain(domain);
344 	u32 *pgt_base_iova = dom->pgt_va + (iova  >> MT2701_IOMMU_PAGE_SHIFT);
347 	spin_lock_irqsave(&dom->pgtlock, flags);
355 	spin_unlock_irqrestore(&dom->pgtlock, flags);
358 	mtk_iommu_v1_tlb_flush_range(dom->data, iova, *mapped);
367 	struct mtk_iommu_v1_domain *dom = to_mtk_domain(domain);
369 	u32 *pgt_base_iova = dom->pgt_va + (iova  >> MT2701_IOMMU_PAGE_SHIFT);
372 	spin_lock_irqsave(&dom->pgtlock, flags);
374 	spin_unlock_irqrestore(&dom->pgtlock, flags);
376 	mtk_iommu_v1_tlb_flush_range(dom->data, iova, size);
383 	struct mtk_iommu_v1_domain *dom = to_mtk_domain(domain);
387 	spin_lock_irqsave(&dom->pgtlock, flags);
388 	pa = *(dom->pgt_va + (iova >> MT2701_IOMMU_PAGE_SHIFT));
390 	spin_unlock_irqrestore(&dom->pgtlock, flags);