drivers/iommu/ipmmu-vmsa.c

71 	struct ipmmu_vmsa_device *mmu;
149 static bool ipmmu_is_root(struct ipmmu_vmsa_device *mmu)
151 	return mmu->root == mmu;
156 	struct ipmmu_vmsa_device *mmu = dev_get_drvdata(dev);
159 	if (ipmmu_is_root(mmu))
160 		*rootp = mmu;
177 static u32 ipmmu_read(struct ipmmu_vmsa_device *mmu, unsigned int offset)
179 	return ioread32(mmu->base + offset);
182 static void ipmmu_write(struct ipmmu_vmsa_device *mmu, unsigned int offset,
185 	iowrite32(data, mmu->base + offset);
188 static unsigned int ipmmu_ctx_reg(struct ipmmu_vmsa_device *mmu,
191 	unsigned int base = mmu->features->ctx_offset_base;
196 	return base + context_id * mmu->features->ctx_offset_stride + reg;
199 static u32 ipmmu_ctx_read(struct ipmmu_vmsa_device *mmu,
202 	return ipmmu_read(mmu, ipmmu_ctx_reg(mmu, context_id, reg));
205 static void ipmmu_ctx_write(struct ipmmu_vmsa_device *mmu,
208 	ipmmu_write(mmu, ipmmu_ctx_reg(mmu, context_id, reg), data);
214 	return ipmmu_ctx_read(domain->mmu->root, domain->context_id, reg);
220 	ipmmu_ctx_write(domain->mmu->root, domain->context_id, reg, data);
226 	if (domain->mmu != domain->mmu->root)
227 		ipmmu_ctx_write(domain->mmu, domain->context_id, reg, data);
229 	ipmmu_ctx_write(domain->mmu->root, domain->context_id, reg, data);
232 static u32 ipmmu_utlb_reg(struct ipmmu_vmsa_device *mmu, unsigned int reg)
234 	return mmu->features->utlb_offset_base + reg;
237 static void ipmmu_imuasid_write(struct ipmmu_vmsa_device *mmu,
240 	ipmmu_write(mmu, ipmmu_utlb_reg(mmu, IMUASID(utlb)), data);
243 static void ipmmu_imuctr_write(struct ipmmu_vmsa_device *mmu,
246 	ipmmu_write(mmu, ipmmu_utlb_reg(mmu, IMUCTR(utlb)), data);
261 		dev_err_ratelimited(domain->mmu->dev,
282 	struct ipmmu_vmsa_device *mmu = domain->mmu;
290 	ipmmu_imuasid_write(mmu, utlb, 0);
292 	ipmmu_imuctr_write(mmu, utlb, IMUCTR_TTSEL_MMU(domain->context_id) |
294 	mmu->utlb_ctx[utlb] = domain->context_id;
303 	struct ipmmu_vmsa_device *mmu = domain->mmu;
305 	ipmmu_imuctr_write(mmu, utlb, 0);
306 	mmu->utlb_ctx[utlb] = IPMMU_CTX_INVALID;
331 static int ipmmu_domain_allocate_context(struct ipmmu_vmsa_device *mmu,
337 	spin_lock_irqsave(&mmu->lock, flags);
339 	ret = find_first_zero_bit(mmu->ctx, mmu->num_ctx);
340 	if (ret != mmu->num_ctx) {
341 		mmu->domains[ret] = domain;
342 		set_bit(ret, mmu->ctx);
346 	spin_unlock_irqrestore(&mmu->lock, flags);
351 static void ipmmu_domain_free_context(struct ipmmu_vmsa_device *mmu,
356 	spin_lock_irqsave(&mmu->lock, flags);
358 	clear_bit(context_id, mmu->ctx);
359 	mmu->domains[context_id] = NULL;
361 	spin_unlock_irqrestore(&mmu->lock, flags);
379 	if (domain->mmu->features->twobit_imttbcr_sl0)
384 	if (domain->mmu->features->cache_snoop)
395 	if (domain->mmu->features->setup_imbuscr)
444 	domain->cfg.iommu_dev = domain->mmu->root->dev;
449 	ret = ipmmu_domain_allocate_context(domain->mmu->root, domain);
458 		ipmmu_domain_free_context(domain->mmu->root,
469 	if (!domain->mmu)
480 	ipmmu_domain_free_context(domain->mmu->root, domain->context_id);
490 	struct ipmmu_vmsa_device *mmu = domain->mmu;
512 		dev_err_ratelimited(mmu->dev, "Multiple TLB hits @0x%lx\n",
515 		dev_err_ratelimited(mmu->dev, "Page Table Walk Abort @0x%lx\n",
527 	if (!report_iommu_fault(&domain->io_domain, mmu->dev, iova, 0))
530 	dev_err_ratelimited(mmu->dev,
539 	struct ipmmu_vmsa_device *mmu = dev;
544 	spin_lock_irqsave(&mmu->lock, flags);
549 	for (i = 0; i < mmu->num_ctx; i++) {
550 		if (!mmu->domains[i])
552 		if (ipmmu_domain_irq(mmu->domains[i]) == IRQ_HANDLED)
556 	spin_unlock_irqrestore(&mmu->lock, flags);
595 	struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
600 	if (!mmu) {
607 	if (!domain->mmu) {
609 		domain->mmu = mmu;
613 			domain->mmu = NULL;
618 	} else if (domain->mmu != mmu) {
691 	if (domain->mmu)
792 	struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
804 	if (!mmu->mapping) {
810 			dev_err(mmu->dev, "failed to create ARM IOMMU mapping\n");
815 		mmu->mapping = mapping;
819 	ret = arm_iommu_attach_device(dev, mmu->mapping);
828 	if (mmu->mapping)
829 		arm_iommu_release_mapping(mmu->mapping);
836 	struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
841 	if (!mmu)
844 	return &mmu->iommu;
861 	struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
867 		ipmmu_imuctr_write(mmu, utlb, 0);
868 		mmu->utlb_ctx[utlb] = IPMMU_CTX_INVALID;
871 	arm_iommu_release_mapping(mmu->mapping);
903 static void ipmmu_device_reset(struct ipmmu_vmsa_device *mmu)
908 	for (i = 0; i < mmu->num_ctx; ++i)
909 		ipmmu_ctx_write(mmu, i, IMCTR, 0);
1007 	struct ipmmu_vmsa_device *mmu;
1011 	mmu = devm_kzalloc(&pdev->dev, sizeof(*mmu), GFP_KERNEL);
1012 	if (!mmu) {
1017 	mmu->dev = &pdev->dev;
1018 	spin_lock_init(&mmu->lock);
1019 	bitmap_zero(mmu->ctx, IPMMU_CTX_MAX);
1020 	mmu->features = of_device_get_match_data(&pdev->dev);
1021 	memset(mmu->utlb_ctx, IPMMU_CTX_INVALID, mmu->features->num_utlbs);
1027 	mmu->base = devm_platform_ioremap_resource(pdev, 0);
1028 	if (IS_ERR(mmu->base))
1029 		return PTR_ERR(mmu->base);
1043 	if (mmu->features->use_ns_alias_offset)
1044 		mmu->base += IM_NS_ALIAS_OFFSET;
1046 	mmu->num_ctx = min(IPMMU_CTX_MAX, mmu->features->number_of_contexts);
1052 	if (!mmu->features->has_cache_leaf_nodes ||
1054 		mmu->root = mmu;
1056 		mmu->root = ipmmu_find_root();
1061 	if (!mmu->root)
1065 	if (ipmmu_is_root(mmu)) {
1071 				       dev_name(&pdev->dev), mmu);
1077 		ipmmu_device_reset(mmu);
1079 		if (mmu->features->reserved_context) {
1081 			set_bit(0, mmu->ctx);
1090 	if (!mmu->features->has_cache_leaf_nodes || !ipmmu_is_root(mmu)) {
1091 		ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL,
1096 		ret = iommu_device_register(&mmu->iommu, &ipmmu_ops, &pdev->dev);
1107 	platform_set_drvdata(pdev, mmu);
1114 	struct ipmmu_vmsa_device *mmu = platform_get_drvdata(pdev);
1116 	iommu_device_sysfs_remove(&mmu->iommu);
1117 	iommu_device_unregister(&mmu->iommu);
1119 	arm_iommu_release_mapping(mmu->mapping);
1121 	ipmmu_device_reset(mmu);
1126 	struct ipmmu_vmsa_device *mmu = dev_get_drvdata(dev);
1130 	if (ipmmu_is_root(mmu)) {
1131 		ipmmu_device_reset(mmu);
1133 		for (i = 0; i < mmu->num_ctx; i++) {
1134 			if (!mmu->domains[i])
1137 			ipmmu_domain_setup_context(mmu->domains[i]);
1142 	for (i = 0; i < mmu->features->num_utlbs; i++) {
1143 		if (mmu->utlb_ctx[i] == IPMMU_CTX_INVALID)
1146 		ipmmu_utlb_enable(mmu->root->domains[mmu->utlb_ctx[i]], i);