iommu/intel/dmar.c

84 	struct acpi_dmar_device_scope *scope;
88 		scope = start;
89 		if (scope->entry_type == ACPI_DMAR_SCOPE_TYPE_NAMESPACE ||
90 		    scope->entry_type == ACPI_DMAR_SCOPE_TYPE_ENDPOINT ||
91 		    scope->entry_type == ACPI_DMAR_SCOPE_TYPE_BRIDGE)
93 		else if (scope->entry_type != ACPI_DMAR_SCOPE_TYPE_IOAPIC &&
94 			scope->entry_type != ACPI_DMAR_SCOPE_TYPE_HPET) {
95 			pr_warn("Unsupported device scope\n");
97 		start += scope->length;
222 	struct acpi_dmar_device_scope *scope;
228 	for (; start < end; start += scope->length) {
229 		scope = start;
230 		if (scope->entry_type != ACPI_DMAR_SCOPE_TYPE_ENDPOINT &&
231 		    scope->entry_type != ACPI_DMAR_SCOPE_TYPE_BRIDGE)
234 		path = (struct acpi_dmar_pci_path *)(scope + 1);
235 		level = (scope->length - sizeof(*scope)) / sizeof(*path);
236 		if (!dmar_match_pci_path(info, scope->bus, path, level))
240 		 * We expect devices with endpoint scope to have normal PCI
241 		 * headers, and devices with bridge scope to have bridge PCI
243 		 * DMAR table with bridge scope, even though they have a
248 		if ((scope->entry_type == ACPI_DMAR_SCOPE_TYPE_ENDPOINT &&
250 		    (scope->entry_type == ACPI_DMAR_SCOPE_TYPE_BRIDGE &&
253 			pr_warn("Device scope type does not match for %s\n",
733 	struct acpi_dmar_device_scope *scope;
743 		for (scope = (void *)(drhd + 1);
744 		     (unsigned long)scope < ((unsigned long)drhd) + drhd->header.length;
745 		     scope = ((void *)scope) + scope->length) {
746 			if (scope->entry_type != ACPI_DMAR_SCOPE_TYPE_NAMESPACE)
748 			if (scope->enumeration_id != device_number)
751 			path = (void *)(scope + 1);
754 				scope->bus, path->device, path->function);
757 					dmaru->devices[i].bus = scope->bus;
767 	pr_warn("No IOMMU scope found for ANDD enumeration ID %d (%s)\n",