Lines Matching refs:data
252 struct iommu_domain domain; /* generic domain data structure */
258 * SysMMU version specific data. Contains offsets for the registers which can
274 int (*get_fault_info)(struct sysmmu_drvdata *data, unsigned int itype,
279 * This structure hold all data of a single SYSMMU controller, this includes
282 * tree. It is usually referenced by 'data' pointer.
302 const struct sysmmu_variant *variant; /* version specific data */
308 #define SYSMMU_REG(data, reg) ((data)->sfrbase + (data)->variant->reg)
310 static int exynos_sysmmu_v1_get_fault_info(struct sysmmu_drvdata *data,
320 fault->addr = readl(data->sfrbase + finfo->addr_reg);
327 static int exynos_sysmmu_v5_get_fault_info(struct sysmmu_drvdata *data,
345 fault->addr = readl(data->sfrbase + addr_reg);
350 static int exynos_sysmmu_v7_get_fault_info(struct sysmmu_drvdata *data,
354 u32 info = readl(SYSMMU_REG(data, fault_info));
356 fault->addr = readl(SYSMMU_REG(data, fault_va));
425 static void sysmmu_unblock(struct sysmmu_drvdata *data)
427 writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
430 static bool sysmmu_block(struct sysmmu_drvdata *data)
434 writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);
435 while ((i > 0) && !(readl(data->sfrbase + REG_MMU_STATUS) & 1))
438 if (!(readl(data->sfrbase + REG_MMU_STATUS) & 1)) {
439 sysmmu_unblock(data);
446 static void __sysmmu_tlb_invalidate(struct sysmmu_drvdata *data)
448 writel(0x1, SYSMMU_REG(data, flush_all));
451 static void __sysmmu_tlb_invalidate_entry(struct sysmmu_drvdata *data,
456 if (MMU_MAJ_VER(data->version) < 5 || num_inv == 1) {
459 SYSMMU_REG(data, flush_entry));
463 writel(iova & SPAGE_MASK, SYSMMU_REG(data, flush_start));
465 SYSMMU_REG(data, flush_end));
466 writel(0x1, SYSMMU_REG(data, flush_range));
470 static void __sysmmu_set_ptbase(struct sysmmu_drvdata *data, phys_addr_t pgd)
474 if (MMU_MAJ_VER(data->version) < 5)
479 writel(pt_base, SYSMMU_REG(data, pt_base));
480 __sysmmu_tlb_invalidate(data);
483 static void __sysmmu_enable_clocks(struct sysmmu_drvdata *data)
485 BUG_ON(clk_prepare_enable(data->clk_master));
486 BUG_ON(clk_prepare_enable(data->clk));
487 BUG_ON(clk_prepare_enable(data->pclk));
488 BUG_ON(clk_prepare_enable(data->aclk));
491 static void __sysmmu_disable_clocks(struct sysmmu_drvdata *data)
493 clk_disable_unprepare(data->aclk);
494 clk_disable_unprepare(data->pclk);
495 clk_disable_unprepare(data->clk);
496 clk_disable_unprepare(data->clk_master);
499 static bool __sysmmu_has_capa1(struct sysmmu_drvdata *data)
501 u32 capa0 = readl(data->sfrbase + REG_V7_CAPA0);
506 static void __sysmmu_get_vcr(struct sysmmu_drvdata *data)
508 u32 capa1 = readl(data->sfrbase + REG_V7_CAPA1);
510 data->has_vcr = capa1 & CAPA1_VCR_ENABLED;
513 static void __sysmmu_get_version(struct sysmmu_drvdata *data)
517 __sysmmu_enable_clocks(data);
519 ver = readl(data->sfrbase + REG_MMU_VERSION);
523 data->version = MAKE_MMU_VER(1, 0);
525 data->version = MMU_RAW_VER(ver);
527 dev_dbg(data->sysmmu, "hardware version: %d.%d\n",
528 MMU_MAJ_VER(data->version), MMU_MIN_VER(data->version));
530 if (MMU_MAJ_VER(data->version) < 5) {
531 data->variant = &sysmmu_v1_variant;
532 } else if (MMU_MAJ_VER(data->version) < 7) {
533 data->variant = &sysmmu_v5_variant;
535 if (__sysmmu_has_capa1(data))
536 __sysmmu_get_vcr(data);
537 if (data->has_vcr)
538 data->variant = &sysmmu_v7_vm_variant;
540 data->variant = &sysmmu_v7_variant;
543 __sysmmu_disable_clocks(data);
546 static void show_fault_information(struct sysmmu_drvdata *data,
551 dev_err(data->sysmmu, "%s: [%s] %s FAULT occurred at %#x\n",
552 dev_name(data->master),
555 dev_dbg(data->sysmmu, "Page table base: %pa\n", &data->pgtable);
556 ent = section_entry(phys_to_virt(data->pgtable), fault->addr);
557 dev_dbg(data->sysmmu, "\tLv1 entry: %#x\n", *ent);
560 dev_dbg(data->sysmmu, "\t Lv2 entry: %#x\n", *ent);
566 struct sysmmu_drvdata *data = dev_id;
571 WARN_ON(!data->active);
573 spin_lock(&data->lock);
574 clk_enable(data->clk_master);
576 itype = __ffs(readl(SYSMMU_REG(data, int_status)));
577 ret = data->variant->get_fault_info(data, itype, &fault);
579 dev_err(data->sysmmu, "Unhandled interrupt bit %u\n", itype);
582 show_fault_information(data, &fault);
584 if (data->domain) {
585 ret = report_iommu_fault(&data->domain->domain, data->master,
592 writel(1 << itype, SYSMMU_REG(data, int_clear));
595 sysmmu_unblock(data);
596 clk_disable(data->clk_master);
597 spin_unlock(&data->lock);
602 static void __sysmmu_disable(struct sysmmu_drvdata *data)
606 clk_enable(data->clk_master);
608 spin_lock_irqsave(&data->lock, flags);
609 writel(CTRL_DISABLE, data->sfrbase + REG_MMU_CTRL);
610 writel(0, data->sfrbase + REG_MMU_CFG);
611 data->active = false;
612 spin_unlock_irqrestore(&data->lock, flags);
614 __sysmmu_disable_clocks(data);
617 static void __sysmmu_init_config(struct sysmmu_drvdata *data)
621 if (data->version <= MAKE_MMU_VER(3, 1))
623 else if (data->version <= MAKE_MMU_VER(3, 2))
630 writel(cfg, data->sfrbase + REG_MMU_CFG);
633 static void __sysmmu_enable_vid(struct sysmmu_drvdata *data)
637 if (MMU_MAJ_VER(data->version) < 7 || !data->has_vcr)
640 ctrl = readl(data->sfrbase + REG_V7_CTRL_VM);
642 writel(ctrl, data->sfrbase + REG_V7_CTRL_VM);
645 static void __sysmmu_enable(struct sysmmu_drvdata *data)
649 __sysmmu_enable_clocks(data);
651 spin_lock_irqsave(&data->lock, flags);
652 writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);
653 __sysmmu_init_config(data);
654 __sysmmu_set_ptbase(data, data->pgtable);
655 __sysmmu_enable_vid(data);
656 writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
657 data->active = true;
658 spin_unlock_irqrestore(&data->lock, flags);
666 clk_disable(data->clk_master);
669 static void sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data,
674 spin_lock_irqsave(&data->lock, flags);
675 if (data->active && data->version >= MAKE_MMU_VER(3, 3)) {
676 clk_enable(data->clk_master);
677 if (sysmmu_block(data)) {
678 if (data->version >= MAKE_MMU_VER(5, 0))
679 __sysmmu_tlb_invalidate(data);
681 __sysmmu_tlb_invalidate_entry(data, iova, 1);
682 sysmmu_unblock(data);
684 clk_disable(data->clk_master);
686 spin_unlock_irqrestore(&data->lock, flags);
689 static void sysmmu_tlb_invalidate_entry(struct sysmmu_drvdata *data,
694 spin_lock_irqsave(&data->lock, flags);
695 if (data->active) {
698 clk_enable(data->clk_master);
710 if (MMU_MAJ_VER(data->version) == 2)
713 if (sysmmu_block(data)) {
714 __sysmmu_tlb_invalidate_entry(data, iova, num_inv);
715 sysmmu_unblock(data);
717 clk_disable(data->clk_master);
719 spin_unlock_irqrestore(&data->lock, flags);
728 struct sysmmu_drvdata *data;
731 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
732 if (!data)
736 data->sfrbase = devm_ioremap_resource(dev, res);
737 if (IS_ERR(data->sfrbase))
738 return PTR_ERR(data->sfrbase);
745 dev_name(dev), data);
751 data->clk = devm_clk_get_optional(dev, "sysmmu");
752 if (IS_ERR(data->clk))
753 return PTR_ERR(data->clk);
755 data->aclk = devm_clk_get_optional(dev, "aclk");
756 if (IS_ERR(data->aclk))
757 return PTR_ERR(data->aclk);
759 data->pclk = devm_clk_get_optional(dev, "pclk");
760 if (IS_ERR(data->pclk))
761 return PTR_ERR(data->pclk);
763 if (!data->clk && (!data->aclk || !data->pclk)) {
768 data->clk_master = devm_clk_get_optional(dev, "master");
769 if (IS_ERR(data->clk_master))
770 return PTR_ERR(data->clk_master);
772 data->sysmmu = dev;
773 spin_lock_init(&data->lock);
775 __sysmmu_get_version(data);
777 ret = iommu_device_sysfs_add(&data->iommu, &pdev->dev, NULL,
778 dev_name(data->sysmmu));
782 platform_set_drvdata(pdev, data);
785 if (MMU_MAJ_VER(data->version) < 5) {
796 if (MMU_MAJ_VER(data->version) >= 5) {
813 ret = iommu_device_register(&data->iommu, &exynos_iommu_ops, dev);
820 iommu_device_sysfs_remove(&data->iommu);
826 struct sysmmu_drvdata *data = dev_get_drvdata(dev);
827 struct device *master = data->master;
833 if (&data->domain->domain != &exynos_identity_domain) {
834 dev_dbg(data->sysmmu, "saving state\n");
835 __sysmmu_disable(data);
844 struct sysmmu_drvdata *data = dev_get_drvdata(dev);
845 struct device *master = data->master;
851 if (&data->domain->domain != &exynos_identity_domain) {
852 dev_dbg(data->sysmmu, "restoring state\n");
853 __sysmmu_enable(data);
944 struct sysmmu_drvdata *data, *next;
952 list_for_each_entry_safe(data, next, &domain->clients, domain_node) {
953 spin_lock(&data->lock);
954 __sysmmu_disable(data);
955 data->pgtable = 0;
956 data->domain = NULL;
957 list_del_init(&data->domain_node);
958 spin_unlock(&data->lock);
987 struct sysmmu_drvdata *data, *next;
998 list_for_each_entry(data, &owner->controllers, owner_node) {
999 pm_runtime_get_noresume(data->sysmmu);
1000 if (pm_runtime_active(data->sysmmu))
1001 __sysmmu_disable(data);
1002 pm_runtime_put(data->sysmmu);
1006 list_for_each_entry_safe(data, next, &domain->clients, domain_node) {
1007 spin_lock(&data->lock);
1008 data->pgtable = 0;
1009 data->domain = NULL;
1010 list_del_init(&data->domain_node);
1011 spin_unlock(&data->lock);
1037 struct sysmmu_drvdata *data;
1049 list_for_each_entry(data, &owner->controllers, owner_node) {
1050 spin_lock(&data->lock);
1051 data->pgtable = pagetable;
1052 data->domain = domain;
1053 list_add_tail(&data->domain_node, &domain->clients);
1054 spin_unlock(&data->lock);
1059 list_for_each_entry(data, &owner->controllers, owner_node) {
1060 pm_runtime_get_noresume(data->sysmmu);
1061 if (pm_runtime_active(data->sysmmu))
1062 __sysmmu_enable(data);
1063 pm_runtime_put(data->sysmmu);
1120 struct sysmmu_drvdata *data;
1123 list_for_each_entry(data, &domain->clients, domain_node)
1124 sysmmu_tlb_invalidate_flpdcache(data, iova);
1157 struct sysmmu_drvdata *data;
1162 list_for_each_entry(data, &domain->clients, domain_node)
1163 sysmmu_tlb_invalidate_flpdcache(data, iova);
1277 struct sysmmu_drvdata *data;
1282 list_for_each_entry(data, &domain->clients, domain_node)
1283 sysmmu_tlb_invalidate_entry(data, iova, size);
1399 struct sysmmu_drvdata *data;
1404 list_for_each_entry(data, &owner->controllers, owner_node) {
1410 data->link = device_link_add(dev, data->sysmmu,
1416 data = list_first_entry(&owner->controllers,
1419 return &data->iommu;
1425 struct sysmmu_drvdata *data;
1429 list_for_each_entry(data, &owner->controllers, owner_node)
1430 device_link_del(data->link);
1438 struct sysmmu_drvdata *data, *entry;
1443 data = platform_get_drvdata(sysmmu);
1444 if (!data) {
1463 if (entry == data)
1466 list_add_tail(&data->owner_node, &owner->controllers);
1467 data->master = dev;