iommu/amd/iommu.c

153 /* Writes the specific IOMMU for a device into the PCI segment rlookup table */
253 	 * The IVRS alias stored in the alias table may not be
274 	 * bus. The IVRS table may know about a quirk that we don't.
1408  * Command send function for invalidating a device table entry
1660 	/* Update device table */
1688  * about domains is the page table mapping the DMA address space they
1769  * Number of GCR3 table levels required. Level must be 4-Kbyte
1946 		/* First mask out possible old values for GCR3 table */
1953 		/* Encode GCR3 table into DTE */
1968 		/* GIOV is supported with V2 page table mode only */
1994 	/* remove entry from the device table seen by the hardware */
2023 	/* Init GCR3 table and update device table */
2025 		/* By default, setup GCR3 table to support single PASID */
2038 	/* Update device table */
2052 	/* Clear GCR3 table */
2309 	 * Force IOMMU v1 page table when allocating
2349 	/* V2 with 4/5 level page table */
2847 			      struct irq_remap_table *table)
2854 	dte	|= iommu_virt_to_phys(table->table);
2864 	struct irq_remap_table *table;
2872 	table = pci_seg->irq_lookup_table[devid];
2873 	if (WARN_ONCE(!table, "%s: no table for devid %x:%x\n",
2877 	return table;
2882 	struct irq_remap_table *table;
2884 	table = kzalloc(sizeof(*table), GFP_KERNEL);
2885 	if (!table)
2888 	table->table = kmem_cache_alloc(amd_iommu_irq_cache, GFP_KERNEL);
2889 	if (!table->table) {
2890 		kfree(table);
2893 	raw_spin_lock_init(&table->lock);
2896 		memset(table->table, 0,
2899 		memset(table->table, 0,
2901 	return table;
2905 				  struct irq_remap_table *table)
2909 	pci_seg->irq_lookup_table[devid] = table;
2910 	set_dte_irq_entry(iommu, devid, table);
2917 	struct irq_remap_table *table = data;
2925 	pci_seg->irq_lookup_table[alias] = table;
2926 	set_dte_irq_entry(iommu, alias, table);
2935 	struct irq_remap_table *table = NULL;
2944 	table = pci_seg->irq_lookup_table[devid];
2945 	if (table)
2949 	table = pci_seg->irq_lookup_table[alias];
2950 	if (table) {
2951 		set_remap_table_entry(iommu, devid, table);
2956 	/* Nothing there yet, allocate new irq remapping table */
2963 	table = pci_seg->irq_lookup_table[devid];
2964 	if (table)
2967 	table = pci_seg->irq_lookup_table[alias];
2968 	if (table) {
2969 		set_remap_table_entry(iommu, devid, table);
2973 	table = new_table;
2978 				       table);
2980 		set_remap_table_entry(iommu, devid, table);
2983 		set_remap_table_entry(iommu, alias, table);
2992 		kmem_cache_free(amd_iommu_irq_cache, new_table->table);
2995 	return table;
3001 	struct irq_remap_table *table;
3005 	table = alloc_irq_table(iommu, devid, pdev);
3006 	if (!table)
3012 	raw_spin_lock_irqsave(&table->lock, flags);
3014 	/* Scan table for free entries */
3015 	for (index = ALIGN(table->min_index, alignment), c = 0;
3017 		if (!iommu->irte_ops->is_allocated(table, index)) {
3027 				iommu->irte_ops->set_allocated(table, index - c + 1);
3039 	raw_spin_unlock_irqrestore(&table->lock, flags);
3047 	struct irq_remap_table *table;
3052 	table = get_irq_table(iommu, devid);
3053 	if (!table)
3056 	raw_spin_lock_irqsave(&table->lock, flags);
3058 	entry = (struct irte_ga *)table->table;
3070 	raw_spin_unlock_irqrestore(&table->lock, flags);
3092 	struct irq_remap_table *table;
3095 	table = get_irq_table(iommu, devid);
3096 	if (!table)
3099 	raw_spin_lock_irqsave(&table->lock, flags);
3100 	table->table[index] = irte->val;
3101 	raw_spin_unlock_irqrestore(&table->lock, flags);
3110 	struct irq_remap_table *table;
3113 	table = get_irq_table(iommu, devid);
3114 	if (!table)
3117 	raw_spin_lock_irqsave(&table->lock, flags);
3118 	iommu->irte_ops->clear_allocated(table, index);
3119 	raw_spin_unlock_irqrestore(&table->lock, flags);
3212 static void irte_set_allocated(struct irq_remap_table *table, int index)
3214 	table->table[index] = IRTE_ALLOCATED;
3217 static void irte_ga_set_allocated(struct irq_remap_table *table, int index)
3219 	struct irte_ga *ptr = (struct irte_ga *)table->table;
3227 static bool irte_is_allocated(struct irq_remap_table *table, int index)
3229 	union irte *ptr = (union irte *)table->table;
3235 static bool irte_ga_is_allocated(struct irq_remap_table *table, int index)
3237 	struct irte_ga *ptr = (struct irte_ga *)table->table;
3243 static void irte_clear_allocated(struct irq_remap_table *table, int index)
3245 	table->table[index] = 0;
3248 static void irte_ga_clear_allocated(struct irq_remap_table *table, int index)
3250 	struct irte_ga *ptr = (struct irte_ga *)table->table;
3371 		struct irq_remap_table *table;
3373 		table = alloc_irq_table(iommu, devid, NULL);
3374 		if (table) {
3375 			if (!table->min_index) {
3380 				table->min_index = 32;
3382 					iommu->irte_ops->set_allocated(table, i);
3384 			WARN_ON(table->min_index != 32);