Lines Matching refs:ts
179 static int hideep_pgm_w_mem(struct hideep_ts *ts, u32 addr,
182 struct pgm_packet *packet = (void *)ts->xfer_buf;
185 .addr = ts->client->addr,
199 ret = i2c_transfer(ts->client->adapter, &msg, 1);
206 static int hideep_pgm_r_mem(struct hideep_ts *ts, u32 addr,
209 struct pgm_packet *packet = (void *)ts->xfer_buf;
213 .addr = ts->client->addr,
219 .addr = ts->client->addr,
233 ret = i2c_transfer(ts->client->adapter, msg, ARRAY_SIZE(msg));
240 static int hideep_pgm_r_reg(struct hideep_ts *ts, u32 addr, u32 *val)
245 error = hideep_pgm_r_mem(ts, addr, &data, 1);
247 dev_err(&ts->client->dev,
257 static int hideep_pgm_w_reg(struct hideep_ts *ts, u32 addr, u32 val)
262 error = hideep_pgm_w_mem(ts, addr, &data, 1);
264 dev_err(&ts->client->dev,
276 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CNT, (clk)); \
277 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x03); \
282 hideep_pgm_w_mem(ts, HIDEEP_SYSCON_WDT_CON, &data, 1); \
286 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON, \
290 hideep_pgm_w_reg(ts, HIDEEP_FLASH_PIO_SIG + (x), (y))
293 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON, 0x00)
302 static void hideep_pgm_set(struct hideep_ts *ts)
304 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x00);
305 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_SPC_CON, 0x00);
306 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_ENA, 0xFF);
307 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_CON, 0x01);
308 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_PWR_CON, 0x01);
309 hideep_pgm_w_reg(ts, HIDEEP_FLASH_TIM, 0x03);
310 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CACHE_CFG, 0x00);
313 static int hideep_pgm_get_pattern(struct hideep_ts *ts, u32 *pattern)
319 error = regmap_bulk_write(ts->reg, p1, &p2, 1);
321 dev_err(&ts->client->dev,
330 error = hideep_pgm_w_reg(ts, HIDEEP_ESI_TX_INVALID, 0x01);
334 error = hideep_pgm_r_reg(ts, HIDEEP_SYSCON_PGM_ID, pattern);
341 static int hideep_enter_pgm(struct hideep_ts *ts)
348 error = hideep_pgm_get_pattern(ts, &pattern);
350 dev_err(&ts->client->dev,
353 dev_err(&ts->client->dev, "%s: bad pattern: %#08x\n",
356 dev_dbg(&ts->client->dev, "found magic code");
358 hideep_pgm_set(ts);
365 dev_err(&ts->client->dev, "failed to enter pgm mode\n");
370 static int hideep_nvm_unlock(struct hideep_ts *ts)
375 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_RPAGE);
376 error = hideep_pgm_r_reg(ts, 0x0000000C, &unmask_code);
377 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE);
385 if (unmask_code != ts->nvm_mask)
386 dev_warn(&ts->client->dev,
388 unmask_code, ts->nvm_mask);
390 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_WPAGE);
393 NVM_W_SFR(HIDEEP_NVM_MASK_OFS, ts->nvm_mask);
395 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE);
400 static int hideep_check_status(struct hideep_ts *ts)
407 error = hideep_pgm_r_reg(ts, HIDEEP_FLASH_STA, &status);
417 static int hideep_program_page(struct hideep_ts *ts, u32 addr,
423 error = hideep_check_status(ts);
437 error = hideep_check_status(ts);
447 hideep_pgm_w_mem(ts, HIDEEP_FLASH_PIO_SIG | HIDEEP_WRONLY,
457 error = hideep_check_status(ts);
466 static int hideep_program_nvm(struct hideep_ts *ts,
469 struct pgm_packet *packet_r = (void *)ts->xfer_buf;
476 error = hideep_nvm_unlock(ts);
484 error = hideep_pgm_r_mem(ts, 0x00000000 + addr,
487 dev_err(&ts->client->dev,
495 error = hideep_program_page(ts, addr,
498 dev_err(&ts->client->dev,
515 static int hideep_verify_nvm(struct hideep_ts *ts,
518 struct pgm_packet *packet_r = (void *)ts->xfer_buf;
530 error = hideep_pgm_r_mem(ts, 0x00000000 + addr,
533 dev_err(&ts->client->dev,
545 dev_err(&ts->client->dev,
562 static int hideep_load_dwz(struct hideep_ts *ts)
567 error = hideep_enter_pgm(ts);
573 error = hideep_pgm_r_mem(ts, HIDEEP_DWZ_INFO,
574 (void *)&ts->dwz_info,
575 sizeof(ts->dwz_info) / sizeof(__be32));
581 dev_err(&ts->client->dev,
586 product_code = be16_to_cpu(ts->dwz_info.product_code);
590 dev_dbg(&ts->client->dev, "used crimson IC");
591 ts->fw_size = 1024 * 48;
592 ts->nvm_mask = 0x00310000;
595 dev_dbg(&ts->client->dev, "used lime IC");
596 ts->fw_size = 1024 * 64;
597 ts->nvm_mask = 0x0030027B;
600 dev_err(&ts->client->dev, "product code is wrong: %#04x",
605 dev_dbg(&ts->client->dev, "firmware release version: %#04x",
606 be16_to_cpu(ts->dwz_info.release_ver));
611 static int hideep_flash_firmware(struct hideep_ts *ts,
618 error = hideep_program_nvm(ts, ucode, ucode_len);
620 error = hideep_verify_nvm(ts, ucode, ucode_len);
629 static int hideep_update_firmware(struct hideep_ts *ts,
634 dev_dbg(&ts->client->dev, "starting firmware update");
637 error = hideep_enter_pgm(ts);
641 error = hideep_flash_firmware(ts, ucode, ucode_len);
643 dev_err(&ts->client->dev,
646 dev_dbg(&ts->client->dev, "firmware updated successfully\n");
650 error2 = hideep_load_dwz(ts);
652 dev_err(&ts->client->dev,
659 static int hideep_power_on(struct hideep_ts *ts)
663 error = regulator_enable(ts->vcc_vdd);
665 dev_err(&ts->client->dev,
670 error = regulator_enable(ts->vcc_vid);
672 dev_err(&ts->client->dev,
678 if (ts->reset_gpio) {
679 gpiod_set_value_cansleep(ts->reset_gpio, 0);
681 error = regmap_write(ts->reg, HIDEEP_RESET_CMD, 0x01);
683 dev_err(&ts->client->dev,
694 struct hideep_ts *ts = data;
696 if (ts->reset_gpio)
697 gpiod_set_value(ts->reset_gpio, 1);
699 regulator_disable(ts->vcc_vid);
700 regulator_disable(ts->vcc_vdd);
723 static void hideep_parse_and_report(struct hideep_ts *ts)
726 (void *)&ts->xfer_buf[HIDEEP_TOUCH_EVENT_INDEX];
727 const u8 *keys = &ts->xfer_buf[HIDEEP_KEY_EVENT_INDEX];
728 int touch_count = ts->xfer_buf[0];
729 int key_count = ts->xfer_buf[1] & 0x0f;
730 int lpm_count = ts->xfer_buf[1] & 0xf0;
734 dev_dbg(&ts->client->dev, "mt = %d, key = %d, lpm = %02x",
739 hideep_report_slot(ts->input_dev, events + i);
745 input_report_key(ts->input_dev,
746 ts->key_codes[key_data & HIDEEP_KEY_IDX_MASK],
750 input_mt_sync_frame(ts->input_dev);
751 input_sync(ts->input_dev);
756 struct hideep_ts *ts = handle;
761 error = regmap_bulk_read(ts->reg, HIDEEP_EVENT_ADDR,
762 ts->xfer_buf, HIDEEP_MAX_EVENT / 2);
764 dev_err(&ts->client->dev, "failed to read events: %d\n", error);
768 hideep_parse_and_report(ts);
774 static int hideep_get_axis_info(struct hideep_ts *ts)
779 error = regmap_bulk_read(ts->reg, 0x28, val, ARRAY_SIZE(val));
783 ts->prop.max_x = le16_to_cpup(val);
784 ts->prop.max_y = le16_to_cpup(val + 1);
786 dev_dbg(&ts->client->dev, "X: %d, Y: %d",
787 ts->prop.max_x, ts->prop.max_y);
792 static int hideep_init_input(struct hideep_ts *ts)
794 struct device *dev = &ts->client->dev;
798 ts->input_dev = devm_input_allocate_device(dev);
799 if (!ts->input_dev) {
804 ts->input_dev->name = HIDEEP_TS_NAME;
805 ts->input_dev->id.bustype = BUS_I2C;
806 input_set_drvdata(ts->input_dev, ts);
808 input_set_capability(ts->input_dev, EV_ABS, ABS_MT_POSITION_X);
809 input_set_capability(ts->input_dev, EV_ABS, ABS_MT_POSITION_Y);
810 input_set_abs_params(ts->input_dev, ABS_MT_PRESSURE, 0, 65535, 0, 0);
811 input_set_abs_params(ts->input_dev, ABS_MT_TOUCH_MAJOR, 0, 255, 0, 0);
812 input_set_abs_params(ts->input_dev, ABS_MT_TOOL_TYPE,
814 touchscreen_parse_properties(ts->input_dev, true, &ts->prop);
816 if (ts->prop.max_x == 0 || ts->prop.max_y == 0) {
817 error = hideep_get_axis_info(ts);
822 error = input_mt_init_slots(ts->input_dev, HIDEEP_MT_MAX,
827 ts->key_num = device_property_count_u32(dev, "linux,keycodes");
828 if (ts->key_num > HIDEEP_KEY_MAX) {
830 ts->key_num);
834 if (ts->key_num <= 0) {
839 ts->key_codes,
840 ts->key_num);
846 if (ts->key_num) {
847 ts->input_dev->keycode = ts->key_codes;
848 ts->input_dev->keycodesize = sizeof(ts->key_codes[0]);
849 ts->input_dev->keycodemax = ts->key_num;
851 for (i = 0; i < ts->key_num; i++)
852 input_set_capability(ts->input_dev, EV_KEY,
853 ts->key_codes[i]);
857 error = input_register_device(ts->input_dev);
871 struct hideep_ts *ts = i2c_get_clientdata(client);
882 be16_to_cpu(ts->dwz_info.product_id));
899 if (fw_entry->size > ts->fw_size) {
901 fw_entry->size, ts->fw_size);
906 mutex_lock(&ts->dev_mutex);
909 error = hideep_update_firmware(ts, (const __be32 *)fw_entry->data,
913 mutex_unlock(&ts->dev_mutex);
927 struct hideep_ts *ts = i2c_get_clientdata(client);
930 mutex_lock(&ts->dev_mutex);
931 len = sysfs_emit(buf, "%04x\n", be16_to_cpu(ts->dwz_info.release_ver));
932 mutex_unlock(&ts->dev_mutex);
941 struct hideep_ts *ts = i2c_get_clientdata(client);
944 mutex_lock(&ts->dev_mutex);
945 len = sysfs_emit(buf, "%04x\n", be16_to_cpu(ts->dwz_info.product_id));
946 mutex_unlock(&ts->dev_mutex);
963 static void hideep_set_work_mode(struct hideep_ts *ts)
974 if (device_property_read_bool(&ts->client->dev, "hideep,force-native-protocol"))
975 regmap_write(ts->reg, HIDEEP_WORK_MODE, 0x00);
981 struct hideep_ts *ts = i2c_get_clientdata(client);
984 hideep_power_off(ts);
992 struct hideep_ts *ts = i2c_get_clientdata(client);
995 error = hideep_power_on(ts);
1001 hideep_set_work_mode(ts);
1020 struct hideep_ts *ts;
1034 ts = devm_kzalloc(&client->dev, sizeof(*ts), GFP_KERNEL);
1035 if (!ts)
1038 ts->client = client;
1039 i2c_set_clientdata(client, ts);
1040 mutex_init(&ts->dev_mutex);
1042 ts->reg = devm_regmap_init_i2c(client, &hideep_regmap_config);
1043 if (IS_ERR(ts->reg)) {
1044 error = PTR_ERR(ts->reg);
1050 ts->vcc_vdd = devm_regulator_get(&client->dev, "vdd");
1051 if (IS_ERR(ts->vcc_vdd))
1052 return PTR_ERR(ts->vcc_vdd);
1054 ts->vcc_vid = devm_regulator_get(&client->dev, "vid");
1055 if (IS_ERR(ts->vcc_vid))
1056 return PTR_ERR(ts->vcc_vid);
1058 ts->reset_gpio = devm_gpiod_get_optional(&client->dev,
1060 if (IS_ERR(ts->reset_gpio))
1061 return PTR_ERR(ts->reset_gpio);
1063 error = hideep_power_on(ts);
1069 error = devm_add_action_or_reset(&client->dev, hideep_power_off, ts);
1073 error = hideep_load_dwz(ts);
1079 hideep_set_work_mode(ts);
1081 error = hideep_init_input(ts);
1087 client->name, ts);
1113 { .compatible = "hideep,hideep-ts" },