hw/mthca/mthca_qp.c

1501 			    const struct ib_ud_wr *wr,
1511 			  mthca_ah_grh_present(to_mah(wr->ah)), 0, 0, 0,
1514 	err = mthca_read_ah(dev, to_mah(wr->ah), &sqp->ud_header);
1525 	switch (wr->wr.opcode) {
1533 		sqp->ud_header.immediate_data = wr->wr.ex.imm_data;
1542 	sqp->ud_header.bth.solicited_event = !!(wr->wr.send_flags & IB_SEND_SOLICITED);
1547 		ib_get_cached_pkey(&dev->ib_dev, qp->port, wr->pkey_index,
1550 	sqp->ud_header.bth.destination_qpn = cpu_to_be32(wr->remote_qpn);
1552 	sqp->ud_header.deth.qkey = cpu_to_be32(wr->remote_qkey & 0x80000000 ?
1553 					       sqp->qkey : wr->remote_qkey);
1595 					   const struct ib_atomic_wr *wr)
1597 	if (wr->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
1598 		aseg->swap_add = cpu_to_be64(wr->swap);
1599 		aseg->compare  = cpu_to_be64(wr->compare_add);
1601 		aseg->swap_add = cpu_to_be64(wr->compare_add);
1608 			     const struct ib_ud_wr *wr)
1610 	useg->lkey    = cpu_to_be32(to_mah(wr->ah)->key);
1611 	useg->av_addr =	cpu_to_be64(to_mah(wr->ah)->avdma);
1612 	useg->dqpn    =	cpu_to_be32(wr->remote_qpn);
1613 	useg->qkey    =	cpu_to_be32(wr->remote_qkey);
1618 			     const struct ib_ud_wr *wr)
1620 	memcpy(useg->av, to_mah(wr->ah)->av, MTHCA_AV_SIZE);
1621 	useg->dqpn = cpu_to_be32(wr->remote_qpn);
1622 	useg->qkey = cpu_to_be32(wr->remote_qkey);
1625 int mthca_tavor_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
1655 	for (nreq = 0; wr; ++nreq, wr = wr->next) {
1662 			*bad_wr = wr;
1673 			((wr->send_flags & IB_SEND_SIGNALED) ?
1675 			((wr->send_flags & IB_SEND_SOLICITED) ?
1678 		if (wr->opcode == IB_WR_SEND_WITH_IMM ||
1679 		    wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM)
1680 			((struct mthca_next_seg *) wqe)->imm = wr->ex.imm_data;
1687 			switch (wr->opcode) {
1690 				set_raddr_seg(wqe, atomic_wr(wr)->remote_addr,
1691 					      atomic_wr(wr)->rkey);
1694 				set_atomic_seg(wqe, atomic_wr(wr));
1703 				set_raddr_seg(wqe, rdma_wr(wr)->remote_addr,
1704 					      rdma_wr(wr)->rkey);
1717 			switch (wr->opcode) {
1720 				set_raddr_seg(wqe, rdma_wr(wr)->remote_addr,
1721 					      rdma_wr(wr)->rkey);
1734 			set_tavor_ud_seg(wqe, ud_wr(wr));
1741 				dev, qp, ind, ud_wr(wr),
1744 				*bad_wr = wr;
1752 		if (wr->num_sge > qp->sq.max_gs) {
1755 			*bad_wr = wr;
1759 		for (i = 0; i < wr->num_sge; ++i) {
1760 			mthca_set_data_seg(wqe, wr->sg_list + i);
1774 		qp->wrid[ind + qp->rq.max] = wr->wr_id;
1776 		if (wr->opcode >= ARRAY_SIZE(mthca_opcode)) {
1779 			*bad_wr = wr;
1786 				    mthca_opcode[wr->opcode]);
1790 				    ((wr->send_flags & IB_SEND_FENCE) ?
1795 			op0   = mthca_opcode[wr->opcode];
1796 			f0    = wr->send_flags & IB_SEND_FENCE ?
1823 int mthca_tavor_post_receive(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
1851 	for (nreq = 0; wr; wr = wr->next) {
1858 			*bad_wr = wr;
1873 		if (unlikely(wr->num_sge > qp->rq.max_gs)) {
1875 			*bad_wr = wr;
1879 		for (i = 0; i < wr->num_sge; ++i) {
1880 			mthca_set_data_seg(wqe, wr->sg_list + i);
1885 		qp->wrid[ind] = wr->wr_id;
1928 int mthca_arbel_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
1959 	for (nreq = 0; wr; ++nreq, wr = wr->next) {
1992 			*bad_wr = wr;
2001 			((wr->send_flags & IB_SEND_SIGNALED) ?
2003 			((wr->send_flags & IB_SEND_SOLICITED) ?
2005 			((wr->send_flags & IB_SEND_IP_CSUM) ?
2008 		if (wr->opcode == IB_WR_SEND_WITH_IMM ||
2009 		    wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM)
2010 			((struct mthca_next_seg *) wqe)->imm = wr->ex.imm_data;
2017 			switch (wr->opcode) {
2020 				set_raddr_seg(wqe, atomic_wr(wr)->remote_addr,
2021 					      atomic_wr(wr)->rkey);
2024 				set_atomic_seg(wqe, atomic_wr(wr));
2033 				set_raddr_seg(wqe, rdma_wr(wr)->remote_addr,
2034 					      rdma_wr(wr)->rkey);
2047 			switch (wr->opcode) {
2050 				set_raddr_seg(wqe, rdma_wr(wr)->remote_addr,
2051 					      rdma_wr(wr)->rkey);
2064 			set_arbel_ud_seg(wqe, ud_wr(wr));
2071 				dev, qp, ind, ud_wr(wr),
2074 				*bad_wr = wr;
2082 		if (wr->num_sge > qp->sq.max_gs) {
2085 			*bad_wr = wr;
2089 		for (i = 0; i < wr->num_sge; ++i) {
2090 			mthca_set_data_seg(wqe, wr->sg_list + i);
2104 		qp->wrid[ind + qp->rq.max] = wr->wr_id;
2106 		if (wr->opcode >= ARRAY_SIZE(mthca_opcode)) {
2109 			*bad_wr = wr;
2116 				    mthca_opcode[wr->opcode]);
2120 				    ((wr->send_flags & IB_SEND_FENCE) ?
2125 			op0   = mthca_opcode[wr->opcode];
2126 			f0    = wr->send_flags & IB_SEND_FENCE ?
2162 int mthca_arbel_post_receive(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
2180 	for (nreq = 0; wr; ++nreq, wr = wr->next) {
2187 			*bad_wr = wr;
2197 		if (unlikely(wr->num_sge > qp->rq.max_gs)) {
2199 			*bad_wr = wr;
2203 		for (i = 0; i < wr->num_sge; ++i) {
2204 			mthca_set_data_seg(wqe, wr->sg_list + i);
2211 		qp->wrid[ind] = wr->wr_id;