hw/hfi1/pcie.c

43 		dd_dev_err(dd, "pci enable failed: error %d\n", -ret);
49 		dd_dev_err(dd, "pci_request_regions fails: err %d\n", -ret);
62 			dd_dev_err(dd, "Unable to set DMA mask: %d\n", ret);
110 		dd_dev_err(dd, "chip PIO range does not match\n");
116 		dd_dev_err(dd, "UC mapping of kregbase1 failed\n");
124 		dd_dev_err(dd, "Cannot read chip CSRs\n");
136 		dd_dev_err(dd, "UC mapping of kregbase2 failed\n");
144 		dd_dev_err(dd, "WC mapping of send buffers failed\n");
158 		dd_dev_err(dd, "WC mapping of receive array failed\n");
222 		dd_dev_err(dd, "Unable to read from PCI config\n");
243 		dd_dev_err(dd, "Can't find PCI Express capability!\n");
252 		dd_dev_err(dd, "Unable to read from PCI config\n");
336 	dd_dev_err(dd, "Unable to write to PCI config\n");
395 	dd_dev_err(dd, "Unable to read from PCI config\n");
741 			dd_dev_err(dd, "Unable to read from PCI config\n");
749 				dd_dev_err(dd,
751 				dd_dev_err(dd, "         prec   attn   post\n");
753 			dd_dev_err(dd, "   p%02d:   %02x     %02x     %02x\n",
756 			dd_dev_err(dd, "            %02x     %02x     %02x\n",
804 		dd_dev_err(dd, "%s: no parent device\n", __func__);
811 			dd_dev_err(dd,
1006 		dd_dev_err(dd, "The PCIe link is not Gen3 capable\n");
1014 		dd_dev_err(dd, "%s: unable to acquire SBus resource\n",
1121 		dd_dev_err(dd, "%s: Invalid Eq Pset %u, setting to %d\n",
1201 		dd_dev_err(dd, "Unable to read from PCI config\n");
1214 			dd_dev_err(dd, "Unable to change parent PCI target speed\n");
1227 		dd_dev_err(dd, "Unable to change device PCI target speed\n");
1282 		dd_dev_err(dd, "%s: Could not restore PCI variables\n",
1304 		dd_dev_err(dd, "SBR failed - unable to read from device\n");
1319 		dd_dev_err(dd, "Unable to read from PCI config\n");
1330 		dd_dev_err(dd,
1341 		dd_dev_err(dd, "%s: gasket error %d\n", __func__, err);
1355 		dd_dev_err(dd, "PCIe link speed or width did not match target%s\n",
1376 		dd_dev_err(dd, "Proceeding at current speed PCIe speed\n");