hw/efa/efa_main.c

94 	struct efa_dev *dev = container_of(eeq->edev, struct efa_dev, edev);
109 	struct efa_com_dev *edev = eq->eeq.edev;
111 	efa_com_eq_comp_intr_handler(edev, &eq->eeq);
120 	efa_com_admin_q_comp_intr_handler(&dev->edev);
121 	efa_com_aenq_intr_handler(&dev->edev, data);
223 	struct efa_com_dev *edev = &dev->edev;
226 		edev->mmio_read.mmio_read_timeout =
230 		edev->aq.poll_interval = hw_hints->poll_interval;
233 		edev->aq.completion_timeout =
254 	if (!efa_com_check_supported_feature_id(&dev->edev,
286 	efa_com_set_feature_ex(&dev->edev, &resp, &cmd, EFA_ADMIN_HOST_INFO,
294 	efa_com_eq_destroy(&dev->edev, &eq->eeq);
307 	err = efa_com_eq_init(&dev->edev, &eq->eeq, efa_process_eqe,
407 	err = efa_com_get_device_attr(&dev->edev, &dev->dev_attr);
416 	err = efa_com_get_hw_hints(&dev->edev, &hw_hints);
423 	err = efa_com_set_aenq_config(&dev->edev, EFA_AENQ_ENABLED_GROUPS);
462 	efa_com_dev_reset(&dev->edev, EFA_REGS_RESET_NORMAL);
501 static int efa_device_init(struct efa_com_dev *edev, struct pci_dev *pdev)
506 	err = efa_com_dev_reset(edev, EFA_REGS_RESET_NORMAL);
510 	err = efa_com_validate_version(edev);
514 	dma_width = efa_com_get_dma_width(edev);
532 	struct efa_com_dev *edev;
553 	edev = &dev->edev;
554 	edev->efa_dev = dev;
555 	edev->dmadev = &pdev->dev;
572 	edev->reg_bar = devm_ioremap(&pdev->dev,
575 	if (!edev->reg_bar) {
581 	err = efa_com_mmio_reg_read_init(edev);
587 	err = efa_device_init(edev, pdev);
599 	edev->aq.msix_vector_idx = dev->admin_msix_vector_idx;
600 	edev->aenq.msix_vector_idx = dev->admin_msix_vector_idx;
606 	err = efa_com_admin_init(edev, &aenq_handlers);
617 	efa_com_mmio_reg_read_destroy(edev);
619 	devm_iounmap(&pdev->dev, edev->reg_bar);
632 	struct efa_com_dev *edev;
634 	edev = &dev->edev;
635 	efa_com_admin_destroy(edev);
638 	efa_com_mmio_reg_read_destroy(edev);
639 	devm_iounmap(&pdev->dev, edev->reg_bar);
679 	efa_com_dev_reset(&dev->edev, EFA_REGS_RESET_SHUTDOWN);