Lines Matching refs:rq
384 struct t4_rq rq;
482 return wq->rq.in_use;
487 return wq->rq.in_use == 0;
492 return wq->rq.size - 1 - wq->rq.in_use;
497 wq->rq.in_use++;
498 if (++wq->rq.pidx == wq->rq.size)
499 wq->rq.pidx = 0;
500 wq->rq.wq_pidx += DIV_ROUND_UP(len16*16, T4_EQ_ENTRY_SIZE);
501 if (wq->rq.wq_pidx >= wq->rq.size * T4_RQ_NUM_SLOTS)
502 wq->rq.wq_pidx %= wq->rq.size * T4_RQ_NUM_SLOTS;
507 wq->rq.in_use--;
508 if (++wq->rq.cidx == wq->rq.size)
509 wq->rq.cidx = 0;
514 return wq->rq.queue[wq->rq.size].status.host_wq_pidx;
519 return wq->rq.size * T4_RQ_NUM_SLOTS;
631 if (wq->rq.bar2_va) {
632 if (inc == 1 && wq->rq.bar2_qid == 0 && wqe) {
633 pr_debug("WC wq->rq.pidx = %d\n", wq->rq.pidx);
635 (wq->rq.bar2_va + SGE_UDB_WCDOORBELL),
638 pr_debug("DB wq->rq.pidx = %d\n", wq->rq.pidx);
639 writel(PIDX_T5_V(inc) | QID_V(wq->rq.bar2_qid),
640 wq->rq.bar2_va + SGE_UDB_KDOORBELL);
647 writel(QID_V(wq->rq.qid) | PIDX_V(inc), wq->db);
664 wq->rq.queue[wq->rq.size].status.db_off = 1;
669 wq->rq.queue[wq->rq.size].status.db_off = 0;